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排序方式: 共有306条查询结果,搜索用时 11 毫秒
1.
In this paper, a new voltage-mode (VM) first-order phase shifter (all-pass filter) employing only four NMOS transistors and minimum number of passive elements (i.e. one resistor and one capacitor) is proposed. The proposed VM phase shifter has high input impedance and does not require passive element matching constraints. Moreover, since only two NMOS transistors are stacked between positive and negative supply voltages, the proposed circuit is suitable for low-voltage operation. Electronic tunability can be provided easily by replacing the employed resistor with an NMOS transistor operating in triode region. Simulation results based on 0.18 μm TSMC CMOS parameters with ±0.9 V supply voltages are given to demonstrate the performance of the proposed phase shifter.  相似文献   
2.
The current study set out to investigate to what extent ISIS is bolstering its jihadist ideology on a ‘cut-and-paste’ or ‘cherry-picked’ version of Islam in their renowned online propaganda magazine Dabiq. The main objective was to examine in a systematic and quantitative way to what extent ISIS utilizes the Koran in an atomistic, truncated and tailored manner to bolster its religious legitimacy. A total of 15 issues of Dabiq and 700 Koranic references were scrutinized. By means of a quantitative analysis we developed an innovative taxonomy of Koranic chapters and verses (i.e. surahs and ayat, respectively) on the basis of their appearance in Dabiq. Our large-scale data analysis provide consistent empirical evidence for severe decontextualization practices of the Koran in three ways: (1) a thin, Medinan-dominated religious layer, (2) ayah mutilation, and (3) clustered versus exclusive mentions. Limitations and implications for future research, policy makers and CVE initiatives are discussed.  相似文献   
3.
Analog circuit designers have usually focused on the design of circuits employing a minimum number of components, occupying less area and dissipating less power. However, some important issues such as signal limitations and especially stability problems of the analog circuits have not received considerable attention in the literature. Hence, the work described in this paper deals with the stability problems of two new current-mode analog filters employing multiple output current controlled conveyors (MOCCCIIs). Toward that end, a single pole model is replaced for each non-ideal current gain of the MOCCCIIs. Both of the novel universal current-mode active-C filters can simultaneously realize low-pass, band-pass and high-pass/notch filter responses. SPICE and MATLAB simulation results are given to verify the theoretical analysis.  相似文献   
4.
In this study, we present a new topology for realizing a grounded inductor employing only a single current conveyor, called a negative‐type modified inverting second‐generation current conveyor (MICCII‐), and a minimum number of passive components, two resistors, and one capacitor. The non‐ideality effects of the MICCII‐on a simulated inductor are investigated. To demonstrate the performance of the presented inductance simulator, we use it to construct a third order Butterworth high‐pass filter and a parallel resonant circuit. Simulation results are given to confirm the theoretical analysis.  相似文献   
5.
In this paper, a new active element called voltage differencing inverting buffered amplifier (VDIBA) is presented. Using single VDIBA and a capacitor, a new resistorless voltage-mode (VM) first-order all-pass filter (APF) is proposed, which provides both inverting and non-inverting outputs at the same configuration simultaneously. The pole frequency of the filter can be electronically controlled by means of bias current of the internal transconductance. No component-matching conditions are required and it has low sensitivity. In addition, the parasitic and loading effects are also investigated. By connecting two newly introduced APFs in open loop a novel second-order APF is proposed. As another application, the proposed VM APF is connected in cascade to a lossy integrator in a closed loop to design a four-phase quadrature oscillator. The theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 CMOS process parameters with ±0.9 V supply voltages. Moreover, the behavior of the proposed VM APF was also experimentally measured using commercially available integrated circuit OPA860 by Texas Instruments.  相似文献   
6.
A novel adaptable analog/digital converter (ADC) that combines analog/digital conversion and entropy-coding for integrated data compression and low-power operation is reported. The converter has high flexibility of operation in terms of adaptable resolution, conversion rate and input signal statistics. This feature allows to adaptively react to changes of the situation and to put the device in each case into the optimum configuration. The ADC has been realized in a 0.6 μm CMOS technology with a peak resolution of 12 bit and 200 kS/s maximum sampling rate. A comprehensive power model of the converter is presented that reflects precisely the power consumption determined from experiments. The model is very useful for optimizing the converter configuration in the node of a wireless sensor network for specific situations. A feasible real-life application is demonstrated.  相似文献   
7.
Defects at the surface and grain boundaries of metal–halide perovskite films lead to performance losses of perovskite solar cells (PSCs). Here, organic cyano‐based π‐conjugated molecules composed of indacenodithieno[3,2‐b]thiophene (IDTT) are reported and it is found that their cyano group can effectively passivate such defects. To achieve a homogeneous distribution, these molecules are dissolved in the antisolvent, used to initiate the perovskite crystallization. It is found that these molecules are self‐anchored at the grain boundaries due to their strong binding to undercoordinated Pb2+. On a device level, this passivation scheme enhances the charge separation and transport at the grain boundaries due to the well‐matched energetic levels between the passivant and the perovskite. Consequently, these benefits contribute directly to the achievement of power conversion efficiencies as high as 21.2%, as well as the improved environmental and thermal stability of the PSCs. The surface treatment provides a new strategy to simultaneously passivate defects and enhance charge extraction/transport at the device interface by manipulating the anchoring groups of the molecules.  相似文献   
8.
In this letter, a new voltage-mode (VM) configuration for providing low-power and simultaneous realization of first-order low-pass, high-pass and all-pass filters is presented. The output of the all-pass filter is taken differentially. The proposed circuit contains low number of components, i.e., only two NMOS transistors, a floating battery, a grounded capacitor and a floating resistor. Adding two NMOS transistors to the proposed circuit it is modified as an all-pass filter with a single-ended output. The main advantage of the presented circuits in comparison with other counterparts is their extremely low power dissipation. Moreover, the floating resistor can be replaced with an additional NMOS transistor in triode region to provide electronic tunability. Simulation results using SPICE program are given to demonstrate the performance of the proposed circuit.  相似文献   
9.
In this paper, a novel design for realizing a voltage-mode (VM) all-pass filter utilizing two differential voltage current conveyors (DVCCs) is proposed. Also, the suggested filter uses a canonical number of passive elements (one grounded capacitor and one resistor) without requiring any element matching condition. The proposed filter has high input and low output impedances, which make it suitable for cascading. The effects of the nonidealities of the DVCCs on the proposed design are investigated. As an application, a quadrature oscillator is designed using the proposed VM all-pass filter and an integrator. The proposed filter and oscillator circuits are simulated using the SPICE simulation program to confirm the theory.  相似文献   
10.
In this paper, a number of simulated floating inductors (FIs) employing second-generation current conveyor (CCII), current-feedback operational amplifier (CFOA), differential voltage current conveyor (DVCC) and differential difference current conveyor (DDCC) are proposed. They employ only a grounded capacitor; accordingly, they are suitable for integrated circuit (IC) implementation. Some of the developed FI simulators demonstrate the feature of improved low-frequency performance while the other ones suffer from the Z/Y terminal parasitic resistors bringing extra series resistors to the inductances of the simulated FIs. Two novel methods for reducing/eliminating the unwanted series resistance in equivalent inductances of the FIs are developed, one of which is called the direct design technique accomplished by adjusting the resistive component/components of the FIs. The series resistors of the FIs affecting their low-frequency performance can be canceled by adding floating negative resistors in series, which is another method. Three of the presented FIs as examples are chosen in order to verify the developed method, perform their simulations and show their performance.  相似文献   
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