A capacitive fingerprint sensor chip using low-temperature poly-Si TFTs on a glass substrate and a novel and unique sensing method

We have developed a capacitive fingerprint sensor chip using low-temperature poly-Si thin film transistors (TFTs). We have obtained good fingerprint images which have sufficient contrast for fingerprint certification. The sensor chip comprises sensor circuits, drive circuits, and a signal processing circuit. The new sensor cell employs only one transistor and one sensor plate within one cell. There is no leakage current to other cells by using a new and unique sensing method. The output of this sensor chip is an analog wave and the designed maximum output level is almost equal to the TFT's threshold voltage, which is 2-3 V for low-temperature poly-Si TFTs. We used a glass substrate and only two metal layers to lower the cost. The size of the trial chip is 30 mm/spl times/20 mm/spl times/1.2 mm and the sensor area is 19.2 mm/spl times/15 mm. The size of the prototype cell is now 60 /spl mu/m/spl times/60 /spl mu/m at 423 dpi, but it will be easy to increase the resolution up to more than 500 dpi. The drive frequency is now 500 kHz and the power consumption is 1.2 mW with a 5-V supply voltage. This new fingerprint sensor is most suitable for mobile use because the sensor chip is low cost and in a thin package with low power consumption.     

High-speed and low-driving-Voltage thin-sheet X-cut LiNbO/sub 3/ Modulator with laminated low-dielectric-constant adhesive

We present a novel thin-sheet X-cut LiNbO/sub 3/ optical modulator structure which can be fabricated by precise polishing and lapping to obtain a thinner LiNbO/sub 3/ substrate for a lower driving voltage in addition to velocity matching and impedance matching. We demonstrated that the fabricated modulator had a driving voltage V/spl pi/ of 2 V and zero chirp for 40-Gb/s operation and had a high potential for suppressed dc drift, and long-term reliability.     

In-situ monitoring of surface stoichiometry and growth kinetics study of GaN (0001) in MOVPE by spectroscopic ellipsometry

GaN surface stoichiometry and growth kinetics in MOVPE were studied by in-situ spectroscopic ellipsometry. The effect of MOVPE conditions on both the surface stoichiometry and growth kinetics was investigated. The surface stoichiometry, such as N-rich, Ga-rich and Ga-excess surfaces, was monitored, and was drastically changed by the variation of the NH₃ partial pressure. When the TMG supply was interrupted during the growth, the layer-by-layer decomposition/revaporation was observed in H₂/NH₃ ambient. The decomposition rate was measured as a function of the NH₃ flow rate at the conventional epilayer growth temperatures (1050–1140 C). The decomposition rate was decreased with the increase in the N coverage on the GaN surface. it was found that the surface stoichiometry is a very important parameter for the control of the MOVPE growth kinetics.     

Observation of Frequency Down-Shift in a Submillimeter Wave Gyrotron

Frequency down-shift in the initial stage of CW or long pulse operation of a submillimeter wave gyrotron, Gyrotron FU IV, is observed. The shift occurs in a few minutes after turning on the operation and the amount of the shift attains even 0.1 GHz. The observation results are analyzed on the basis of a simple model for heat conduction in the region of a resonant cavity. The frequency shift is explained consistently by expansion of the cavity.     

A hierarchical multilayer QoS routing system with dynamic SLAmanagement

This paper proposes a hierarchical multilayer QoS routing system with dynamic SLA management for large-scale IP networks. Previously, the promising approach to provide QoS in large-scale IP networks using a mixture of DiffServ-based QoS management and MPLS-based traffic engineering has been actively discussed. However, the introduction of QoS exacerbates the already existing scalability problems of the standard IP routing protocols. In order to address this issue, we propose a new scalable routing framework based on hierarchical QoS-aware path computation. We augment the existing OSPF and CR-LDP protocols to support hierarchical QoS routing, QoS aggregation, and QoS reservation in our MPLS-DiffServ-based hierarchical routing network. In order to provide additional flexibility and cost-efficiency, we augment the network with a policy server which is capable of dynamically handling SLAs between the networks and providing load balancing management within the network. We implement a prototype of the proposed framework and study its performance with a virtual network simulator and specially designed QoS routing algorithm simulator. In our simulations, we evaluate both the implementation complexity and algorithms performance; the results demonstrate the efficiency of the framework and its advantages over the existing proposals     

High-performance C60 and picene thin film field-effect transistors with conducting polymer electrodes in bottom contact structure

C₆₀ and picene thin film field-effect transistors (FETs) in bottom contact structure have been fabricated with poly(3,4-ethylenedioxythiophene): poly(styrenesulfonate) (PEDOT:PSS) electrodes for a realization of mechanical flexible organic FETs. The C₆₀ thin film FETs showed n-channel enhancement-type characteristics with the field-effect mobility μ value of 0.41 cm² V^?1 s^?1, while the picene thin film FET showed p-channel enhancement-type characteristics with the μ of 0.61 cm² V^?1 s^?1. The μ values recorded for C₆₀ and picene thin film FETs are comparable to those for C₆₀ and picene thin film FETs with Au electrodes.     

A PWM signal processing core circuit based on a switched currentintegration technique

A highly functional circuit for pulse width modulation (PWM) signal processing is proposed as a core of the A-D merged circuit architecture for time-domain information processing. The core circuit employs a switched-current integration technique as its computing architecture and functions as a linear arithmetic operator, a memory, and also a delaying device of PWM signals. A 0.8-μm CMOS test chip includes 110 transistors plus two capacitors and performs parallel additions and multiplications at the accuracy of 1.2 ns. A cumulative property of the technique allows the circuit to serve as a low-power accumulator that consumes 23% of the energy of the full digital 7-b accumulator. A PWM multiply-accumulate unit and a nonlinear operation unit are also proposed to extend functionality of the circuit. Since the PWM signal carries multibit data in a binary amplitude pulse, these circuits can be favorably applicable to low-voltage and low-power designs in the deep submicrometer era     

Effects of arc current and electrode size on electrode erosion in ac plasma torches

Heavy erosion of the electrode is a problem in using ac plasma torches. In a series of our studies, the effects of electrode stem size (diameter and length) and tip shape on the electrode erosion were clarified at a low current of 200 A. In this paper, on the basis of the 200-A data, in order to reduce the electrode erosion with the current increased, the effects of current and electrode size on electrode erosion were clarified experimentally and analytically between 100 and 550 A. The electrode used was of solid type and the material was tungsten containing 2 wt% of lanthanum oxide. The plasma gas was argon. Main results are as follows. (1) As the current increased, the electrode erosion increased linearly. In the case of thin electrodes (8 mm ø), between 450 and 550 A, the electrode tip was molten partially and the electrode erosion increased rapidly over 5 mg/h. However, for thick electrodes (13 mm ø), the electrode erosion did not increase rapidly. (2) The temperature distribution along the electrode axis was calculated. As a result, a good correlation was obtained between the calculated temperature of electrode tip and the measured electrode erosion. As the tip temperature decreased to 3000 K (cf. tungsten melting point: 3660 K), the electrode erosion decreased below 5 mg/h of the linearly increasing range.