The iterative contribution and relevance of modelling to UK energy policy

This paper discusses the iterative provision of modelling insights on long-term decarbonisation scenarios for UK energy policy makers. A multi-year model construction process of the UK MARKAL-Macro-hybrid energy-economic model, and four subsequent major policy analyses illustrates the scope of this interaction. The initial set of modelling runs focused on the technical feasibility of long-term 60% carbon dioxide (CO₂) reduction scenarios, the role of key technologies, and the underlying uncertainties. Furthermore subsequent modelling studies were aimed to generate insights on more stringent targets, and on issues and uncertainties that may make targets harder to achieve. Hence, this paper analyses the large number of long-term UK CO₂ reduction scenarios through a clustering approach on target stringency and barriers to implementation. Robust findings and key uncertainties are highlighted, including the critical role of the power sector, trade-offs between resources, sectors, key energy technologies and behavioural responses, and the increasing level and spread of CO₂ marginal prices and GDP impacts. The relevance and use of modelling insights to the UK energy policy process is shown in the continuation of the energy modelling–policy interface. This constitutes both ongoing model development, and nuanced scenario analysis designed to further explore key uncertainties in evolving policy issues.     

Modularization of a Large-Scale Business Application: A Case Study

Large software systems, developed over several years, are the backbone of industries such as banking, retail, transportation, and telecommunications. With multiple bug fixes and feature enhancements, these systems gradually deviate from the intended architecture and deteriorate into unmanageable monoliths. This article presents a case study of a banking application besot with such problems and the modularization approach that the company adopted as a solution. It also highlights benefits unearthed as a result of this reengineering exercise.     

Lattice dynamics of colloidal crystals during photopolymerization of acrylic monomer matrix

The photoinitiated bulk polymerization process, which has been used recently in the manufacture of solid optical diffraction filters, is examined to understand the dynamics of both the crystalline colloidal arrays (CCA) and the host monomer species. Our analysis indicates that volume shrinkage of the monomer, changes in the dielectric properties of the monomer, and inhomogeneities of polymerization reaction rate across the dispersion during the polymerization process, are the major contributors for observed lattice compression and lattice disorder of the CCA of silica spheres in polymerized acrylic/methacrylic ester films. The effect of orientation of photocell with respect to the radiation source on Bragg diffraction of CCA indicated the presence of convective stirring in the thin fluid system during the photopolymerization that deleteriously affects the periodic array structures. To devise reproducible and more efficient optical filters, experimental methods to minimize or eliminate convective instabilities in monomeric dispersions during polymerization are suggested. © 1998 Chapman & Hall     

Influence of sea water solution on mortar containing calcium carbonate

Normal Portland cement mortar discs containing precipitated or ground limestone at dosages of 0, 2.5, 5 and 15% were made at water/cement ratios of 0.42 or 0.60. They were hydrated in lime water or sea water solution for periods up to 1 year. The length and modulus of elasticity changes were monitored periodically. Some mortars containing CaCO₃ exhibited more than three times the expansion of the reference in sea water. The expansions were greater in samples containing fine CaCO₃. The modulus of elasticity was especially low for samples containing precipitated CaCO₃ and exposed to sea water.     

Origin of room-temperature ferromagnetism in cobalt-doped ZnO

Thin films of ZnO doped with cobalt have been grown by the pulsed laser deposition (PLD) technique in different temperatures ranging from 500°C to 650°C. The films grown on sapphire c-plane single crystal were found to be highly epitaxial. Magnetic properties of these films were studied, and the films exhibited ferromagnetic characteristics at room temperature. Detailed structural and microstructural characterization was performed to correlate the fate of the magnetic impurities, i.e., cobalt, and the cause of magnetic properties. It is established from this work that the magnetic properties of these films are inherent to the system, and any presence of second phase/nanoclusters/precipitates are ruled out as the cause of magnetic properties. The techniques used to establish these were conventional and high-resolution transmission electron microscopy (HRTEM) along with electron-energy loss spectroscopy (EELS) and scanning transmission electron microscopy-atomic number (STEM-Z) contrast studies.     

Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip

The second in the Niagara series of processors (Niagara2) from Sun Microsystems is based on the power-efficient chip multi-threading (CMT) architecture optimized for Space, Watts (Power), and Performance (SWaP) [SWap Rating = Performance/(Space _* Power) ]. It doubles the throughput performance and performance/watt, and provides >10times improvement in floating point throughput performance as compared to UltraSPARC T1 (Niagara1). There are two 10 Gb Ethernet ports on chip. Niagara2 has eight SPARC cores, each supporting concurrent execution of eight threads for 64 threads total. Each SPARC core has a floating point and graphics unit and an advanced cryptographic unit which provides high enough bandwidth to run the two 10 Gb Ethernet ports encrypted at wire speeds. There is a 4 MB Level2 cache on chip. Each of the four on-chip memory controllers controls two FBDIMM channels. Niagara2 has 503 million transistors on a 342 mm² die packaged in a flip-chip glass ceramic package with 1831 pins. The chip is built in Texas Instruments' 65 nm 11LM triple-Vt CMOS process. It operates at 1.4 GHz at 1.1 V and consumes 84 W.