CMOS static RAM chip with high-speed optical read and write

We present the first demonstration of a dense VLSI RAM technology with high-speed optical read and optical write capability. The CMOS-based Static-RAM technology is capable of parallel optical access with read/write speeds limited by the native RAM access times. We fabricated a 2/spl times/2 mm optoelectronic-VLSI test chip incorporating 800-b storage and 200 optical I/O based on the hybrid integration of GaAs-AlGaAs MQW modulators on CMOS. Results from the photonic-SRAM test-chip confirm 6.2 ns read and 8-ns write capability.     

Wireless Communication Based Evaluation of Power Consumption for Constrained Energy System

Wireless Personal Communications - In previous papers, decoding schemes which did not use machine learning considered additive white Gaussian noise or memoryless impulse noise. The decoding methods...     

Code and receiver design for the noncoherent fast-fading channel

This paper deals with the design of coding/modulation and demodulation/decoding schemes for single- or multiple-antenna systems with focus on fast-fading channels, where channel state information (CSI) is not available at the transmitter and the receiver. We explore two possible solutions for this channel with increasing degree of sophistication. The first one utilizes pilots at the transmitter and a simple and explicit noniterative channel estimation algorithm at the receiver. We show that this pilot-assisted system is exactly equivalent, in terms of performance analysis and design, to an appropriately "degraded" system having perfect CSI at the receiver. The second scheme utilizes pilots and a family of well-justified and simple suboptimal iterative detection/estimation algorithms. It is shown that when turbo-like codes are considered in conjunction with this pilot-assisted transmission scheme and the proposed receiver algorithm, the unitary constellations investigated in the literature are inferior to simple pilot-assisted constellations in both complexity and performance. Specific instances of the proposed systems (that use optimized irregular low-density parity-check outer codes) are designed. The design examples provided show that the proposed systems can achieve a good tradeoff between complexity and performance and can be used to bridge the gap between the high complexity/high-performance optimal scheme and low-complexity/mediocre performance noniterative estimation/coherent detection scheme.     

Multiconstrained and multipath QoS aware routing protocol for MANETs

The multimedia applications such as audio, video transmission in Mobile Ad Hoc Network (MANET) requires that the path in which such data transmits must be delay sensitive, reliable and energy efficient. An existing MANET routing protocol Ad Hoc On demand Multipath Distance Vector (AOMDV) fails to perform well in terms of QoS metrics such as delay, jitter, packet delivery ratio (PDR) etc., where there is high mobility and heavy traffic. The paths which are stored in the Routing table are not reliable and energy efficient. It is possible to modify the route discovery of AODV so that more than one node disjoint, link reliable and energy efficient paths are stored in the routing table. The proposed protocol Multiconstrained and Multipath QoS Aware Routing Protocol (MMQARP) is novel, which takes care of QoS parameters dynamically and simultaneously along with path finding, so that only link reliable, energy efficient paths are available for data transmission. The extensive simulation study shows that the proposed protocol performs better in terms of PDR, delay and jitter compared to AOMDV protocol.     

Optoelectronic-VLSI: photonics integrated with VLSI circuits

Optoelectronic-VLSI (OE-VLSI) technology represents the intimate integration of photonic devices with silicon VLSI electronics. We review the motivations and status of emerging OE-VLSI technologies and examine the performance of OE-VLSI technology versus conventional wire-bonded OE packaging. The results suggest that OE-VLSI integration offers substantial power and speed improvements even when relatively small numbers of photonic devices are driven with commodity complementary metal-oxide-semiconductor logic technologies