A 2.5-10-GHz clock multiplier unit with 0.22-ps RMS jitter in standard 0.18-/spl mu/m CMOS

This paper demonstrates a low-jitter clock multiplier unit that generates a 10-GHz output clock from a 2.5-GHz reference clock. An integrated 10-GHz LC oscillator is locked to the input clock, using a simple and fast phase detector circuit that overcomes the speed limitation of a conventional tri-state phase frequency detector due to the lack of an internal feedback loop. A frequency detector guarantees PLL locking without degenerating jitter performance. The clock multiplier is implemented in a standard 0.18-/spl mu/m CMOS process and achieves a jitter generation of 0.22 ps while consuming 100 mW power from a 1.8-V supply.     

Next-generation 100-gigabit metro ethernet (100 GbME) using multiwavelength optical rings

This paper investigates the challenges for developing the current local area network (LAN)-based Ethernet protocol into a technology for future network architectures that is capable of satisfying dynamic traffic demands with hard service guarantees using high-bit-rate channels (80...100 Gb/s). The objective is to combine high-speed optical transmission and physical interfaces (PHY) with a medium access control (MAC) protocol, designed to meet the service guarantees in future metropolitan-area networks (MANs). Ethernet is an ideal candidate for the extension into the MAN as it allows seamless compatibility with the majority of existing LANs. The proposed extension of the MAC protocol focuses on backward compatibility as well as on the exploitation of the wavelength domain for routing of variable traffic demands. The high bit rates envisaged will easily exhaust the capacity of a single optical fiber in the C band and will require network algorithms optimizing the reuse of wavelength resources. To investigate this, four different static and dynamic optical architectures were studied that potentially offer advantages over current link-based designs. Both analytical and numerical modeling techniques were applied to quantify and compare the network performance for all architectures in terms of achievable throughput, delay, and the number of required wavelengths and to investigate the impact of nonuniform traffic demands. The results show that significant resource savings can be achieved by using end-to-end dynamic lightpath allocation, but at the expense of high delay.     

Iterative method for the design of DFT filter Bank

Multirate adaptive filters have numerous advantages such as low computational load, fast convergence, and parallelism in the adaptation. Drawbacks when using multirate processing are mainly related to aliasing and reconstruction effects. These effects can be minimized by introducing appropriate problem formulation and employing sophisticated optimization techniques. In this paper, we propose a formulation for the design of a filter bank which controls the distortion level for each frequency component directly and minimizes the inband aliasing and the residual aliasing between different subbands. The advantage of this problem formulation is that the distortion level can be weighted for each frequency depending on the particular practical application. A new iterative algorithm is proposed to optimize simultaneously over both the analysis and the synthesis filter banks. This algorithm is shown to have a unique solution for each iteration. For a fixed distortion level, the proposed algorithm yields a significant reduction in both the inband aliasing and the residual aliasing levels compared to existing methods applied to the numerical examples.     

A 1-V 15 μW High-Accuracy Temperature Switch

A CMOS temperature switch with uncalibrated high accuracy is presented. The circuit is based on the classical CMOS bandgap reference structure, using parasitic PNPs and a PTAT multiplier. The circuit was designed in a standard digital 0.18 m CMOS process. The temperature switch has an in-designed hysteresis of 1.2°C around a threshold value of 128°C. At the switching-threshold all matched transistors have also matched operating conditions, yielding a temperature threshold that is highly independent of transistor output resistance and supply voltage. The chip area was minimized using a novel and generic strategy. With a chip area of only 0.03 mm², the onwafer 3 spread of the threshold temperature is 1.1°C. Power consumption is only 15 A at 1 volt supply.     

A CORDIC processor for FFT computation and its implementation usinggallium arsenide technology

In this paper, the architecture and the implementation of a complex fast Fourier transform (CFFT) processor using 0.6 μm gallium arsenide (GaAs) technology are presented. This processor computes a 1024-point FFT of 16 bit complex data in less than 8 μs, working at a frequency beyond 700 MHz, with a power consumption of 12.5 W. The architecture of the processor is based on the COordinate Rotation DIgital Computer (CORDIC) algorithm, which avoids the use of conventional multiplication-and-accumulation (MAC) units, but evaluates the trigonometric functions using only add and shift operations, Improvements to the basic CORDIC architecture are introduced in order to reduce the area and power of the processor. This together with the use of pipelining and carry save adders produces a very regular and fast processor, The CORDIC units were fabricated and tested in order to anticipate the final performance of the processor. This work also demonstrates the maturity of GaAs technology for implementing ultrahigh-performance signal processors     

Gyrotron coaxial cylindrical resonators with corrugated innerconductor: Theory and experiment

Gyrotron coaxial resonators with a longitudinally slotted inner cylinder are examined analytically using a surface impedance model, from which expressions for the electromagnetic field, ohmic quality (Q) factor, and characteristic equation of the transverse eigenvalues χ _m,p are obtained. The major attributes of such resonators are expressed by the dependence of χ_m,p on the parameter C-defined as the ratio of the outer to inner radii of the coaxial structure. In that connection, the effect of the corrugation parameters on χ_m,p is particularly investigated on the basis of an expression derived for the slope function dχ_m,p,p/dC. It is shown that the χ_m,p(C) curve may either exhibit oscillatory behavior or present a flat portion over a wide range of C depending on the corrugation parameters chosen. The theory is checked against experiment in which resonant frequencies and total Q factors were measured for TE modes operating in the range of 8-16 GHz in a coaxial cavity with 40 slots. Good agreement is found in that the magnitude of the relative error in frequency is less than 0.5%. Corrugated coaxial resonators prove to be relevant to megawatt gyrotrons where highly selective cavities are required to ensure high conversion efficiency     

Advanced thin-film silicon-on-sapphire technology: microwavecircuit applications

This paper reviews the prospects of thin-film silicon-on-sapphire (TFSOS) CMOS technology in microwave applications in the 1-5 GHz regime and beyond and presents the first demonstration of microwave integrated circuits based on this technology, MOSFET's optimized for microwave use, with 0.5-μm optically defined gate lengths and a T-gate structure, have f_t values of 25 GHz (14 GHz) and f_max values of 66 GHz (41 GHz) for n-channel (p-channel) devices and have noise figure values below 1 db at 2 GHz, some of the best reported performance characteristics of any silicon-based MOSFET's to date. On-chip spiral inductors exhibit quality factors above ten. Circuit performance compares favorably with that of other CMOS-based technologies and approach performance levels similar to those obtained by silicon bipolar technologies. The results demonstrate the significant potential of this technology for microwave applications     

Orthogonal transmultiplexers in communication: a review

This paper presents conventional and emerging applications of orthogonal synthesis/analysis transform configurations (transmultiplexer) in communications. It emphasizes that orthogonality is the underlying concept in the design of many communication systems. It is shown that orthogonal filter banks (subband transforms) with proper time-frequency features can play a more important role in the design of new systems. The general concepts of filter bank theory are tied together with the application-specific requirements of several different communication systems. Therefore, this paper is an attempt to increase the visibility of emerging communication applications of orthogonal filter banks and to generate more research activity in the signal processing community on these topics     

Molecular-beam epitaxial growth of HgCdTe infrared focal-plane arrays on silicon substrates for midwave infrared applications

Molecular beam epitaxy has been employed to deposit HgCdTe infrared detector structures on Si(112) substrates with performance at 125K that is equivalent to detectors grown on conventional CdZnTe substrates. The detector structures are grown on Si via CdTe(112)B buffer layers, whose structural properties include x-ray rocking curve full width at half maximum of 63 arc-sec and near-surface etch pit density of 3–5 × 10⁵ cm⁻² for 9 μm thick CdTe films. HgCdTe p⁺-on-n device structures were grown by molecular beam epitaxy (MBE) on both bulk CdZnTe and Si with 125K cutoff wavelengths ranging from 3.5 to 5 μm. External quantum efficiencies of 70%, limited only by reflection loss at the uncoated Si-vacuum interface, were achieved for detectors on Si. The current-voltage (I-V) characteristics of MBE-grown detectors on CdZnTe and Si were found to be equivalent, with reverse breakdown voltages well in excess of 700 mV. The temperature dependences of the I-V characteristics of MBE-grown diodes on CdZnTe and Si were found to be essentially identical and in agreement with a diffusion-limited current model for temperatures down to 110K. The performance of MBE-grown diodes on Si is also equivalent to that of typical liquid phase epitaxy-grown devices on CdZnTe with R₀A products in the 10⁶–10⁷ Θ-cm² range for 3.6 μm cutoff at 125K and R₀A products in the 10⁴–10⁵ Θ-cm² range for 4.7 μm cutoff at 125K.     

Oscillation of the scattering time in a 2D electron system with oval antidots

Electron scattering by a single barrier is predicted to reveal singularities as the magnetic field is changed, because the number of electron collisions with the barrier dramatically increases as chaotic orbits around the barrier are changed into periodic orbits. To test this experimentally we have measured the magnetoresistance of AlGaAs/GaAs heterostructures with a two-dimensional electron gas and a lateral lattice containing a macroscopic number of oval-shaped antidots fabricated using electron lithography. Reproducible fluctuations in the magnetoresistance are observed at low field, which are due to the oscillations of the number of electron collisions with the antidots. The number of collisions N before the electron escapes from the antidot has been calculated as a function of B in an electric field. The position of the maxima in N(B) obtained from calculations and experiment are in reasonable agreement.