Analysis and Design of a Dynamic Predistorter for WCDMA Handset Power Amplifiers

This paper presents a dynamic predistorter (PD), which linearizes the dynamic AM-AM and AM-PM of a wideband code division multiple access handset power amplifier (PA). The dynamic PD allows an adjacent channel leakage power ratio (ACPR) improvement of 15.7 dB, which is superior to conventional PDs that linearize static AM-AM and AM-PM. The dynamic PD was designed using an HBT generating nonlinearity, a short circuit at the baseband (les4 MHz), and a load circuit for the HBT at the RF fundamental band (ap1.95 GHz). Volterra-series analysis was performed to understand the mechanism of the dynamic PD. The analysis revealed that the short circuit at the baseband enabled the dynamic PD generating third-order intermodulation distortion (IMD3) with opposite phase to the fundamental tone (i.e., antiphase IMD3). The antiphase IMD3 allows dynamic gain compression, which linearizes the dynamic gain expansion of a PA with low quiescent current. The analysis also revealed that the IMD3 amplitude of the dynamic PD can be adjusted by load impedance at the RF fundamental band, which enables the gradient of dynamic AM-AM and AM-PM to be optimized to linearize the PA. The fabricated two-stage InGaP/GaAs HBT PA module with the dynamic PD exhibited an ACPR of -40 dBc and a power-added efficiency of 50% at an average output power of 26.8 dBm with a quiescent current of 20 mA     

A practical high-latchup immunity design methodology for internalcircuits in the standard cell-based CMOS/BiCMOS LSIs

A practical high-latchup-immunity design methodology is proposed for high-density internal circuits in standard cell-based CMOS/BiCMOS LSIs. Both locally injected trigger current and uniformly generated trigger current were measured using a new test structure. Focusing on the difference in the well shunt resistance between local and uniform trigger currents, a practical latchup-free guideline based on an analytical model for uniformly generated trigger current in the well is presented for the periodic placement of well contacts dependent on parasitic device parameters, on generated trigger current level, and a layout pattern size     

Characterization of polymer-adhesive interfaces on a nanometre scale by elemental mapping and image EELS using EFTEM

Energy-filtering transmission electron microscopy (EFTEM) was applied for investigating interfaces between a polymer and an adhesive. The sample employed in this work is polybutylene terephtharate (PBT) sheets laminated with an epoxy adhesive. It was found that heat aging of the PBT at 180 degrees C in air for > 9 h prior to adhesion decreases the adhesion strength drastically. To investigate this unfavourable aging effect on the adhesion strength, we performed elemental mapping and image EELS using EFTEM. A weak boundary layer with a thickness of < 50 nm was visualized at the PBT-adhesive interface by elemental mapping in the sample subjected to the heat aging and image EELS revealed the origin of this layer. Thus, we clearly correlated the nanoscale interfacial structure with the adhesion strength by EFTEM.     

High-Speed X-Cut Thin-Sheet LiNbO3 Optical Modulator With Folded Structure

We propose a small-footprint X-cut thin-sheet lithium niobate optical modulator with high-speed and low-driving-voltage characteristics. Since an optical waveguide is folded by a mirror placed at one edge of the modulation chip, the chip can be shortened by about half. In addition, a wide modulation bandwidth can be achieved, because the path-length difference between the optical waveguide and the coplanar-waveguide (CPW) electrode is decreased to as short as possible by placing the CPW electrode as far as possible along the optical waveguide in the folded portion, and the microwave effective index is set to realize effective velocity matching between the lightwave and the microwave. A small footprint of 1.78 times 29 mm, a low half-wave voltage of 2.0 V at dc, and a 3-dBe modulation bandwidth of 20 GHz were obtained.     

High-speed and low-driving-Voltage thin-sheet X-cut LiNbO/sub 3/ Modulator with laminated low-dielectric-constant adhesive

We present a novel thin-sheet X-cut LiNbO/sub 3/ optical modulator structure which can be fabricated by precise polishing and lapping to obtain a thinner LiNbO/sub 3/ substrate for a lower driving voltage in addition to velocity matching and impedance matching. We demonstrated that the fabricated modulator had a driving voltage V/spl pi/ of 2 V and zero chirp for 40-Gb/s operation and had a high potential for suppressed dc drift, and long-term reliability.     

Q-factor definition and evaluation for spiral inductors fabricated using wafer-level CSP technology

A novel Q-factor definition and evaluation method are proposed for low-loss high-Q spiral inductors fabricated by using the wafer-level chip-size package (WLP) on silicon substrates, where the copper wiring technology with a polyimide isolation layer is used. In conventional Q-factor evaluation for inductors, a short-circuited load condition is used, where the Q factor is represented by using Y-parameters as Q=Im{1/Y/sub 11/}/Re{1/Y/sub 11/}. This conventional method provides a Q factor of 20 with 2-5-nH inductance around 3.9 GHz. However, since structures for the spiral inductors are asymmetrical, the short-circuited load condition and short-circuited source condition give different Q values, respectively. The Q-value differences of approximately 100% have often been observed in the WLP. The differences mainly come from differences in loss estimation. In a novel method, a complex conjugate impedance-matching condition is retained both at an input port and an output port of the inductor. The maximum available power gain (G/sub AMAX/) is introduced to evaluate the energy loss in one cycle. This condition provides a unique insertion loss of passive devices. Thus, the difference of the Q factor depends only on the difference of magnetic and electric energy. The difference of the Q value is reduced.     

Application of focused ion beam techniques and transmission electron microscopy to thin-film transistor failure analysis

The locations of process-induced defects in hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs), which are used as elements of active-matrix liquid crystal displays, were investigated by combining focused ion beam techniques with cross-sectional transmission electron microscopy (X-TEM). The FIB technique is applied to TFT failure analysis problems, which require considerable localised etching without inducing mechanical stress or damage at fragile failure locations. We demonstrate the manner in which these techniques are used to characterise TFT defects such as pinholes and portions of the multilayer damaged by mechanical stress. A dramatic improvement brought about by the FIB technique is the increase in temporal efficiency of sample preparations. X-TEM observations also lead to identification of the fault and analysis of its cause, which in turn lead to a marked yield improvement.     

40 Gbit/s electroabsorption modulators with impedance-controlled electrodes

A novel travelling-wave electroabsorption optical modulator, electrically matched for 50 /spl Omega/ loads of driving circuit drivers, was developed. The scattering parameter of electric reflection (S/sub 11/) from this modulator is less than -20 dB at 20 GHz. It can thus enable a 40 Gbit/s, 2 km SMF transmission with a 0.3 dB penalty at a 1.3 /spl mu/m wavelength.     

Optical Burst Switching Router With 40-,10-Gb/s Bit-Rate Transparent Contention Resolution

We report a bit-rate transparent optical burst switching (OBS) router prototype using a fast 5 times 5 PLZT [(Pb,La)(Zr,Ti)O₃ ] optical matrix switch. Dynamic switching in a two-wavelength, 2 times 2 OBS switch is demonstrated. Contention resolution using a tunable Mach-Zehnder interferometer wavelength converter for both 40- and 10-Gb/s bursts is demonstrated for the first time. Error-free operation was achieved for both bit rates under the same settings, as required in autonomous networks     

Low-power chip interconnection by dynamic termination

A low-power dynamic termination scheme is proposed and demonstrated as a way to reduce power dissipation for high-speed data transport. In this scheme, the transmission lines are terminated only if the signals change. The gate of a switching MOS transistor connected to a termination resistor is driven by differentiating the transmission signal with a resistor and a capacitor. The power dissipation of the terminating resistor can be reduced to 1/5 in the conventional determination scheme, and overshoot can be reduced to 1/5 that in the open scheme. This scheme is promising for use with palm-top equipment, facilitating high-speed low power operation