Mimic Drug Dosage Modulation for Neuroplasticity Based on Charge-Trap Layered Electronics

The human brain is often likened to an incredibly complex and intricate computer, rather than electrical devices, consisting of billions of neuronal cells connected by synapses. Different brain circuits are responsible for coordinating and performing specific functions. The reward pathway of the synaptic plasticity in the brain is strongly related to the features of both drug addiction and relief. In the current study, a synaptic device based on layered hafnium disulfide (HfS₂) is developed for the first time, to emulate the behavioral mechanisms of drug dosage modulation for neuroplasticity. A strong gate-dependent persistent photocurrent is observed, arising from the modulation of substrate-trapping events. By controlling the polarity of gate voltage, the basic functions of biological synapses are realized under a range of light spiking conditions. Furthermore, under the control of detrapping/trapping events at the HfS₂/SiO₂ interface, positive/negative correlations of the A_n/A₁ index, which significantly reflected the weight change of synaptic plasticity, are realized under the same stimulation conditions for the emulation of the drug-related addition/relief behaviors in the brain. The findings provide a new advance for mimicking human brain plasticity.     

Conceptual design of rain radar for the tropical rainfall measuring mission

Specifications for a spaceborne rain radar for tropical rainfall measurement are described. A spaceborne rain radar has problems peculiar to rain observation from space. The radar must have a fast scanning mechanism to cover a large swath. Very weak rain echoes compared to the sea or land surface signal must be detected. These capabilities must be attained under the severe power consumption and mass limitations of the satellite bus. The fast scanning requirement forces application of an electrically scanning mechanism. This requirement also causes a severe limitation of the available number of independent samples. The requirement for weak rain echoes excludes application of the pulse compression technique, which is a very conventional technique for other active microwave sensors on board satellites. Under these constraints, a rain radar with an electrically scanning planar antenna at 13-8 GHz is proposed.     

Structural advantages of rectangular-like channel cross-section on electrical characteristics of silicon nanowire field-effect transistors

We have experimentally demonstrated structural advantages due to rounded corners of rectangular-like cross-section of silicon nanowire (SiNW) field-effect transistors (FETs) on on-current (I_ON), inversion charge density normalized by a peripheral length of channel cross-section (Q_inv) and effective carrier mobility (μ_eff). The I_ON was evaluated at the overdrive voltage (V_OV) of 1.0 V, which is the difference between gate voltage (V_g) and the threshold voltage (V_th), and at the drain voltage of 1.0 V. The SiNW nFETs have revealed high I_ON of 1600 μA/μm of the channel width (w_NW) of 19 nm and height (h_NW) of 12 nm with the gate length (L_g) of 65 nm. We have separated the amount of on-current per wire at V_OV = 1.0 V to a corner component and a flat surface component, and the contribution of the corners was nearly 60% of the total I_ON of the SiNW nFET with L_g of 65 nm. Higher Q_inv at V_OV = 1.0 V evaluated by advanced split-CV method was obtained with narrower SiNW FET, and it has been revealed the amount of inversion charge near corners occupied 50% of all the amount of inversion charge of the SiNW FET (w_NW = 19 nm and h_NW = 12 nm). We also obtained high μ_eff of the SiNW FETs compared with that of SOI planar nFETs. The μ_eff at the corners of SiNW FET has been calculated with the separated amount of inversion charge and drain conductance. Higher μ_eff around corners is obtained than the original μ_eff of the SiNW nFETs. The higher μ_eff and the large fractions of I_ON and Q_inv around the corners indicate that the rounded corners of rectangular-like cross-sections play important roles on the enhancement of the electrical performance of the SiNW nFETs.     

填充热丝激光窄间隙焊接的实验研究

将填充热丝应用到高光束质量、长焦距的光纤激光窄间隙焊接中,不锈钢母材通过激光加热,镍基焊丝通过电流加热,有效利用复合热源的优势,提高了焊丝过渡稳定性和熔覆效率。通过高速摄像机对送丝过程进行在线观察,分析工艺参数对焊丝过渡的影响。研究不锈钢和镍基合金异种金属窄间隙焊接接头的凝固组织,并对焊缝金属进行元素分布扫描。研究发现,由焊丝电流和送丝速度等工艺参数决定的送丝稳定性是影响填充热丝激光焊接质量的最主要因素。对于窄间隙焊接,采用与间隙宽度相当的离焦光斑激光热导焊,可形成较好的侧壁熔合,由熔融金属曲面和侧壁构成的激光反射是侧壁熔合的主要原因。焊缝冷却速度较快,焊缝金属的凝固组织呈明显的对生生长,在坡口侧壁附近其生长方向与侧壁近似垂直,焊缝不存在宏观偏析。在间隙底部直角处容易出现未熔合现象,采用底部圆弧过渡的U型坡口后,可较好地解决底部未熔合问题,获得了无宏观缺陷的焊接接头。     

Direct Growth of Germanene at Interfaces between Van der Waals Materials and Ag(111)

Germanene, a 2D honeycomb germanium crystal, is grown at graphene/Ag(111) and hexagonal boron nitride (h-BN)/Ag(111) interfaces by segregating germanium atoms. A simple annealing process in N₂ or H₂/Ar at ambient pressure leads to the formation of germanene, indicating that an ultrahigh-vacuum condition is not necessary. The grown germanene is stable in air and uniform over the entire area covered with a van der Waals (vdW) material. As an important finding, it is necessary to use a vdW material as a cap layer for the present germanene growth method since the use of an Al₂O₃ cap layer results in no germanene formation. The present study also proves that Raman spectroscopy in air is a powerful tool for characterizing germanene at the interfaces, which is concluded by multiple analyses including first-principles density functional theory calculations. The direct growth of h-BN-capped germanene on Ag(111), which is demonstrated in the present study, is considered to be a promising technique for the fabrication of future germanene-based electronic devices.     

Theoretical and Experimental Insight into the Mechanism for Spontaneous Vertical Growth of ReS2 Nanosheets

Rhenium disulfide (ReS₂) differs fundamentally from other group‐VI transition metal dichalcogenides (TMDs) due to its low structural symmetry, which results in its optical and electrical anisotropy. Although vertical growth is observed in some TMDs under special growth conditions, vertical growth in ReS₂ is very different in that it is highly spontaneous and substrate‐independent. In this study, the mechanism that underpins the thermodynamically favorable vertical growth mode of ReS₂ is uncovered. It is found that the governing mechanism for ReS₂ growth involves two distinct stages. In the first stage, ReS₂ grows parallel to the growth substrate, consistent with conventional TMD growth. However, subsequent vertical growth is nucleated at points on the lattice where Re atoms are “pinched” together. At such sites, an additional Re atom binds with the cluster of pinched Re atoms, leaving an under‐coordinated S atom protruding out of the ReS₂ plane. This under‐coordinated S is “reactive” and binds to free Re and S atoms, initiating growth in a direction perpendicular to the ReS₂ surface. The utility of such vertical ReS₂ arrays in applications where high surface‐to‐volume ratio and electric‐field enhancement are essential, such as surface enhanced Raman spectroscopy, field emission, and solar‐based disinfection of bacteria, is demonstrated.     

Silicon based on-chip antenna using an LC resonator for near-field RF systems

This paper presents the silicon based on-chip antenna using a LC resonator. The proposed antenna consists of a stacked capacitor and a spiral inductor on silicon substrate. The spiral inductor structure without underpass was proposed for improvement the performance of the silicon based-antenna. The resonant frequency of the fabricated antenna was measured as 465 MHz. Its return loss was 23.4 dB at resonant frequency. The antenna has a gain of ?35.75 dBi due to small size and silicon substrate. However, the fabricated antenna has good performance in the near-field.     

Atomistic origin of high-quality “novel SiON gate dielectrics”

We have investigated the effect of the oxygen incorporation into SiN films by the first principles calculations. The calculated results show that the oxygen incorporation tends to generate defect states in SiN band gap by forming dangling bonds and floating bonds of Si. Based on the calculated results, it is also indicated that the high quality SiON film can be fabricated by suppressing the incorporation of O atoms into the SiN film, reproducing the reported experiments.     

HVEM study of crack-tip dislocations in Si crystals prepared by FIB and twin-blade cutting method

Crack-tip dislocations in silicon crystals have been examined by using high-voltage electron microscopy. Cracks were introduced by the Vickers indentation method at room temperature and the indented specimens were annealed at high temperatures to induce dislocations around crack tips under the presence of residual stress due to the indentation. A selected area around a crack tip was thinned by a focused ion beam (FIB) technique. Specimens were thinned in advance by a twin-blade cutting (TBC) method, which is a simple cutting process for saving FIB machine time. A combination of FIB and TBC can be a useful thinning procedure for the efficient preparation of transmission electron microscopy specimens. Characteristic dislocation structures were observed around the tip of a crack, aiding the elucidation of dislocation processes, which is essential to increase the fracture toughness of materials.     

Ultra-thin high-density LSI packaging substrate for advanced CSPs and SiPs

An ultra-thin high-density LSI packaging substrate, called multi-layer thin substrate (MLTS), is described. It meets the demand for chip scale packages (CSPs) and systems in a package (SiPs) for use in recently developed small portable applications with multiple functions. A high-density build-up structure is fabricated on a Cu plate, which is then removed, leaving only an ultra-thin, high-density multi-layer substrate. MLTS has (1) excellent registration accuracy, which enables higher density and finer pitch patterning due to the use of a rigid, excellent-flatness Cu base plate; (2) a thinner multi-layer structure due to the use of a core-less multi-layer structure; (3) excellent reliability, supported by the use of an aramid-reinforced epoxy resin dielectric layer; and (4) a cost-effective design due to the use of fewer layers fabricated using a conventional build-up process. A prototype high-density CSP (0.4-mm pitch/288 pins/4 rows/10 mm²) was fabricated using a 90-μm-thick MLTS (with a solder resist layer). Testing demonstrated that it had excellent long-term reliability. A prototype ultra-thin, high-density SiP (0.5-mm pitch/225 pins/11 mm²/0.93 mm thick) was also fabricated based on MLTS. MLTS consists of only two conductor layers (total thickness: 90 μm) while an identical-function build-up printed wiring board needs four conductor layers (total thickness: 300 μm). With its thinner core-less multi-layer structure, MLTS enables the fabrication of ultra-thin, high-density SiPs.