Loop admittance matrix modification for the digital simulation of power converter circuits

The analysis of the equivalent circuit of power converters presents unique difficulties due to the continuously changing conduction state of power semiconductor switches which introduce open- and short-circuit branches. Presently available methods mainly aim at automatically assembling the loop impedance matrix describing any particular conduction pattern. In this paper a novel powerful method is developed for automatically treating this varying topology circuit analysis problem by direct modification of the corresponding loop admittance matrix. In this way the inversion of any matrix is avoided. In particular, the loop admittance matrix (the solution matrix) for an existing conducting state of the switching elements is constructed by modifying the associated matrix corresponding to the previous conduction pattern. These modifications include a change of reference frame and/or elimination and/or addition of one or more loops on a solution matrix level and are expressed in an algorithmic form suitable for digital computer simulation.