Arraying needle-like TiO2 particles in a composite film by applying ac bias and its transmittance anisotropy

In an effort to improve energy-efficient windows, we experimented with a precursor slurry composite by using needle-like TiO₂ particles as the filler in a urethane matrix. Applying dc bias to the slurry failed to array the needle-like particles in the composite and to deposit on the film surface because of electrophoretic movement. However, applying ac bias of ±5 V to the precursor slurry composite for 12 h resulted in the needle-like TiO₂ particles being arrayed in the composite in a direction normal to the film surface. This resulted in an improvement in the energy efficiency of the material through an angular dependence of transmittance in the visible–near-infrared range.     

Thermoelectric Properties of Multifilled Skutterudites with La as the Main Filler

Bulk multifilled n- and p-type skutterudites with La as the main filler were fabricated using the spark plasma sintering (SPS) method. The thermoelectric properties and thermal stability of these skutterudites were investigated. It was found that the interactions among the filling atoms also play a vital role in reducing the lattice thermal conductivity of the multifilled skutterudites. ZT = 0.76 for p-type La_0.8Ba_0.01Ga_0.1Ti_0.1Fe₃CoSb₁₂ and ZT = 1.0 for n-type La_0.3Ca_0.1Al_0.1Ga_0.1In_0.2Co_3.75Fe_0.25Sb₁₂ skutterudites have been achieved. Furthermore, the differential scanning calorimetry (DSC) results show that there is no skutterudite phase decomposition till 750°C for the La_0.8Ba_0.01Ga_0.1Ti_0.1Fe₃CoSb₁₂ sample. The thermal stability of the La_0.8Ba_0.01Ga_0.1Ti_0.1Fe₃CoSb₁₂ skutterudite is greatly improved. Using the developed multifilled skutterudites, the fabricated module with size of 50 mm × 50 mm × 7.6 mm possesses maximum output power of 32 W under the condition of hot/cold sides = 600°C/50°C.     

Photoluminescence measurements on undoped CdZnTe grown by the high-pressure bridgman method

The low temperature photoluminescence of Cd_0.91Zn_0.09Te grown by the high-pressure Bridgman (HPB) method exhibits a neutral donor bound exciton emission (D⁰X) at 1.65603 eV with its excited state (D⁰X^*) at 1.65798 eV and neutral acceptor bound exciton emissions (A⁰X) at 1.64566 eV and 1.65201 eV. Assuming a direct generation and subsequent relaxation of excitons at the D⁰X^* state, we demonstrate that the temporal evolution of the above emission bands is well reproduced by a set of rate equations. The resultant radiative-lifetime of 1.4 ns for the D⁰X and 1.5 and 2.0 ns for the A⁰Xs are compared with various CdZnTe's (CZTs) grown by the other methods to demonstrate the particular nature of the HPB CZT.     

Removal of Interlayer Water of two Ti3C2Tx MXenes as a Versatile Tool for Controlling the Fermi-Level Pinning-Free Schottky Diodes with Nb:SrTiO3

Striving for the sixth-generation communication technology discovery, semiconductors beyond Si with wider bandgaps as well as non-conventional metals are actively being sought to achieve high speeds whilst maintaining devices miniaturization. 2D materials may provide the potential for downsizing, but their functional advantage over existing counterparts still longs to be discovered. Along that path, surface-adsorbed or bulk-intercalated water molecules remaining after wet-chemical synthesis of 2D materials are generally seen as obstacles to high-performance achievement. Herein, the control of such water within the interlayers of solution-processed metallic 2D titanium carbide (MXene) by vacuum annealing duration is demonstrated. Moreover, the impact of water removal on work function (WF) and functional terminations is unveiled for the first time. Furthermore, the usefulness of such water for controlling a novel Schottky diode in contact with an n-type oxide semiconductor, niobium-doped strontium titanate (Nb:SrTiO₃) is observed. The advantage of MXene compared to conventional gold as facile processing, WF tunability, and lower turn-on voltage in the Schottky anode application is highlighted. This fundamental study shows the way for a novel Schottky diode preparation in atmospheric conditions and provides implications for further research directions aiming at commercialization.     

A 150 ns 16-Mb CMOS SRAM with interdigitated bit-line architecture

Circuit techniques for a reduced-voltage-amplitude data bus, fast access 16-Mb CMOS SRAM are described. An interdigitated bit-line architecture reduces data bus line length, thus minimizing bus capacitance. A hierarchical sense amplifier consists of 32 local sense amplifiers and a current sense amplifier. The current sense amplifier is used to reduce the data bus voltage amplitude and the sensing of the 16-b data bus signals in parallel. Access time of 15 ns and an active power of 165 mW were achieved in a 16-Mb CMOS SRAM. A split-word-line layout memory cell with double-gate pMOS thin-film transistors (TFTs) keeps the transistor width stable while providing high-stability memory cell characteristics. The double-gate pMOS TFT also increases cell-storage node capacitance and soft-error immunity     

A 90-nm low-power 32-kB embedded SRAM with gate leakage suppression circuit for mobile applications

In sub-100-nm generation, gate-tunneling leakage current increases and dominates the total standby leakage current of LSIs based on decreasing gate-oxide thickness. Showing that the gate leakage current is effectively reduced by lowering the gate voltage, we propose a local dc level control (LDLC) for SRAM cell arrays and an automatic gate leakage suppression driver (AGLSD) for peripheral circuits. We designed and fabricated a 32-kB 1-port SRAM using 90-nm CMOS technology. The six-transistor SRAM cell size is 1.25 /spl mu/m/sup 2/. Evaluation shows that the standby current of 32-kB SRAM is 1.2 /spl mu/A at 1.2 V and room temperature. It is reduced to 7.5% of conventional SRAM.     

Multi-oxide layer structure for single-mode operation invertical-cavity surface-emitting lasers

We propose a novel vertical-cavity surface emitting laser (VCSEL) with Al(Ga)As multi-oxide layer (MOX) structure for the purpose of enlarging window aperture maintaining single transverse mode operation. We have fabricated an InGaAs-GaAs VCSEL with the proposed MOX structure formed on GaAs (311)B substrate. We have performed a numerical simulation to investigate single-mode behavior of the proposed structure and showed a possibility of single-mode VCSEL's with a large active area. We have fabricated an 11-μm current aperture 960-nm wavelength VCSEL with this MOX structure. The threshold current and voltage were 1.0 mA and 2.0 V, respectively, which are comparable to those of conventional oxide VCSELs. In 8-μm aperture, single-mode operation was maintained with a driving current up to four times the threshold     

Speed limit of all-optical gate switches using cascaded second-order nonlinear effect in quasi-phase-matched LiNbO/sub 3/ devices

In all-optical gate switches that employ the cascaded second-order nonlinear effect in quasi-phase-matched (QPM) LiNbO/sub 3/ devices, walkoff between the fundamental and second harmonic pulses is very large. The authors experimentally show that crosstalk of the switch induced by such walkoff limits the switching speed, but that the switching speed can significantly be enhanced by walkoff compensation. Using a 20-mm-long QPM LiNbO/sub 3/ waveguide device, the authors switch one of twin pulses separated by 6.25 ps without crosstalk, showing the possibility of switching a 160-Gb/s signal.     

Experimental Study of a Thermoelectric Generation System

A flat wall-like thermoelectric generation system is developed for applications in exhaust heat of kilns. The design of the whole experimental setup is presented. The essential performance of the thermoelectric generation system is tested, including open-circuit voltage, output power, and system conversion efficiency. The results illustrate that, when heat source insulation is not considered, the system conversion is efficient at hot-side temperatures between 120°C and 150°C. In addition, the nonuniformity of heat transfer is found to significantly affect the power-generating ability of the system. System-level simulation is carried out using a quasi-one-dimensional numerical model that enables direct comparison with experimental results. The results of both experiment and simulation will provide a foundation to improve and optimize complex thermoelectric generation systems.     

A capacitive fingerprint sensor chip using low-temperature poly-Si TFTs on a glass substrate and a novel and unique sensing method

We have developed a capacitive fingerprint sensor chip using low-temperature poly-Si thin film transistors (TFTs). We have obtained good fingerprint images which have sufficient contrast for fingerprint certification. The sensor chip comprises sensor circuits, drive circuits, and a signal processing circuit. The new sensor cell employs only one transistor and one sensor plate within one cell. There is no leakage current to other cells by using a new and unique sensing method. The output of this sensor chip is an analog wave and the designed maximum output level is almost equal to the TFT's threshold voltage, which is 2-3 V for low-temperature poly-Si TFTs. We used a glass substrate and only two metal layers to lower the cost. The size of the trial chip is 30 mm/spl times/20 mm/spl times/1.2 mm and the sensor area is 19.2 mm/spl times/15 mm. The size of the prototype cell is now 60 /spl mu/m/spl times/60 /spl mu/m at 423 dpi, but it will be easy to increase the resolution up to more than 500 dpi. The drive frequency is now 500 kHz and the power consumption is 1.2 mW with a 5-V supply voltage. This new fingerprint sensor is most suitable for mobile use because the sensor chip is low cost and in a thin package with low power consumption.