Toward integrated product and process life cycle planning—An environmental perspective

Life cycle engineering (LCE) is a key concept for promoting environmentally sustainable practices among manufacturing firms. A major hurdle in the implementation of LCE is the lack of a systematic and strategic method to design or plan an entire product life cycle. To address this issue, this keynote provides a framework for life cycle development and proposes the concept of life cycle planning. This paper aims to provide explicit and systematic methodologies for life cycle planning by reviewing this research area. Practical cases that employ life cycle planning are also illustrated. Finally, some research directions are suggested.     

Quality assessment models for initial production process control based on stochastic differential equations

It is of great importance to assess an initial production process prior to the regular mass-production. For this purpose, many statistical methods have been proposed for practical use. In this paper, we propose two stochastic models for an assessment method of the initial production process control: a Markov process model and a Markov approximation model. These models are continuous state space models and formulated by applying mathematical techniques of stochastic differential equations. Based on each model, we derive several quantitative assessment measures for initial production process control.     

A novel high-performance utility-interactive photovoltaic inverter system

This paper presents a novel photovoltaic inverter that cannot only synchronize a sinusoidal AC output current with a utility line voltage, but also control the power generation of each photovoltaic module in an array. The proposed inverter system is composed of a half-bridge inverter at the utility interface and a novel generation control circuit which compensates for reductions in the output power of the system that are attributable to variations in the generation conditions of respective photovoltaic modules. The generation control circuit allows each photovoltaic module to operate independently at peak capacity, simply by detecting the output power of the system. Furthermore, the generation control circuit attenuates low-frequency ripple voltage, which is caused by the half-bridge inverter, across the photovoltaic modules. Consequently, the output power of the system is increased due to the increase in average power generated by the photovoltaic modules. The effectiveness of the proposed inverter system is confirmed experimentally and by means of simulation.     

Automated bias control (ABC) circuit for high-performance VLSIs

A biasing scheme for sensing circuits, namely an automated bias control (ABC) circuit, for high-performance VLSIs is described. The ABC circuit can automatically gear the output level of sensing circuits to the input threshold voltage of the succeeding CMOS converters. The sensing performance can be accelerated with the ABC circuit either by reducing the excessive signal level margin between the sensing circuits and the CMOS converters or by reducing extra stages of signal amplification. Since feedback control of the ABC circuit ensures correct DC biasing even under large process deviations and circuit condition changes, a wider operation margin can also be obtained. Three successful applications of the ABC circuit are reported: a sense amplifier, an address transition detector (ATD), and an ECL-CMOS input buffer. A 64-kb BiCMOS SRAM employing the proposed sense amplifier and the ATD has been fabricated with a 0.8-μm 9-GHz BiCMOS technology. The SRAM has an address access time of 4.5 ns     

Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memoryarray processor applications

We have fabricated a high yield integrated memory array processor (IMAP) LSI, which features a high memory bandwidth (1.28-GB/s) and low power consumption (4-W max.) and which contains a 2-Mb SRAM with 1.28-I/O's and 64 processor elements (PE's) in one chip. A high-bandwidth and low-power memory circuit design is the key technology to realize the IMAP-LSI. We adopted following new designs for memory circuit. (1) Memory access time is designed to be twice as fast as PE execution time (2) Employment of dynamic power control mode, which reduces the memory power consumption down to 30% of maximum power without a loss in access-speed (3) Simplified synchronization with PE's (4) 4-way block redundancy. These design techniques are suitable for future system integrated ULSI's     

A block-oriented RAM with half-sized DRAM cell and quasi-foldeddata-line architecture

The authors describe a block-oriented random-access memory (BORAM) based on a series-connected cell concept and a quasi-folded data-line architecture. The series-connected cell concept allows a nearly half-sized DRAM cell even when using the same fabrication process as for conventional DRAMs. The low-noise quasi-folded data-line architecture allows the data-line capacitance to be one eighth the conventional value at the minimum, or the number of cells per amplifier to be 64 times the conventional number at the maximum. In addition, this architecture provides a more relaxed layout for the READ/WRITE circuits. The operation of four series-connected cells is observed successfully through a test device which includes a voltage-to-current conversion circuit, a current-mirror amplifier, and a 0.76-μm² crown-shaped stack-capacitor (STC) cell     

Efficient erbium-doped fibre amplifier pumped at 820 nm

The highest gain coefficients of 0.86 dB/mW at 1.552 mu m and 0.72 dB/mW at 1.534 mu m are realised at a pumping wavelength of 822 nm by using an erbium-doped fibre with a relative refractive index difference as high as 1.67%, a low intrinsic loss, and an erbium ion concentration of 210 p.p.m. The gains at 1.552 mu m reach 25 and 30 dB for launched pump powers of 30 and 40 mW, respectively.<>     

Broad-band GaAs monolithic equalizing amplifiers formultigigabit-per-second optical receivers

The authors discuss the development of ICs (integrated circuits) for a preamplifier, a gain-controllable amplifier, and main amplifiers with and without a three-way divider for multigigabit-per-second optical receivers using a single-ended parallel feedback circuit, two (inductor and capacitor) peaking techniques, and advanced GaAs process technology. An optical front-end circuit consisting of a GaAs preamplifier and an InGaAs p-i-n photodiode achieves a 3-dB bandwidth of 7 GHz and -12-dBm sensitivity at 10 Gb/s. Moreover, a gain-controllable amplifier obtains a maximum gain of 15 dB, a gain dynamic range of 25 dB, and a 3-dB bandwidth of 6.1 GHz by controlling the source bias of the common-source circuit. Gain, 3-dB bandwidth, and output power of the main amplifier with the three-way divider are 17.4 dB, 5.2 GHz, and 5 dBm, respectively. These ICs can be applied to optical receivers transmitting NRZ signals in excess of 7 Gb/s     

Raman spectra of GaPAs–GaP heterostructure waveguides

A GaPAs waveguide with GaP cladding layers, has been fabricated in only two steps of LPE growth. One-way optical loss of the fabricated GaPAs–GaP waveguide is 12% mm⁻¹ (α=1.9 cm⁻¹). The free carrier concentration of the GaPAs layer is 1×10¹⁶ cm⁻³ (α=0.05 cm⁻¹). The backward spontaneous Raman spectrum from the GaPAs waveguide shows a GaP-like longitudinal optical (LO) phonon line. The LO band is intensified and shifted to a higher frequency compared to the LO phonon of GaP bulk crystal.     

Internal voltage generator for low voltage, quarter-micrometerflash memories

A fabricated bandgap generator using 0.25-μm Flash memory process generated a stable reference voltage under 4 V, boosted from an external power supply of 2.5 V. The generated voltage was 1.297±0.025 V at a power supply of 4 V±10%; the temperature dependence was +0.7 mV/°C. The characteristics of a triple-well bipolar transistor for the Flash memory process are sufficient for a reference voltage generator; f_T is 230 MHz, and H_FE is 70. Dynamic operation reduced the average current consumption from 306 to 8.6 μA. Fabricated voltage-doubler circuits generated a voltage 1.8 times larger than that from conventional charge-pump circuits