Ag/Ni Metallization Bilayer: A Functional Layer for Highly Efficient Polycrystalline SnSe Thermoelectric Modules

The structural and electrical characteristics of Ag/Ni bilayer metallization on polycrystalline thermoelectric SnSe were investigated. Two difficulties with thermoelectric SnSe metallization were identified for Ag and Ni single layers: Sn diffusion into the Ag metallization layer and unexpected cracks in the Ni metallization layer. The proposed Ag/Ni bilayer was prepared by hot-pressing, demonstrating successful metallization on the SnSe surface without interfacial cracks or elemental penetration into the metallization layer. Structural analysis revealed that the Ni layer reacts with SnSe, forming several crystalline phases during metallization that are beneficial for reducing contact resistance. Detailed investigation of the Ni/SnSe interface layer confirms columnar Ni-Sn intermetallic phases [(Ni₃Sn and Ni₃Sn₂) and Ni_5.63SnSe₂] that suppress Sn diffusion into the Ag layer. Electrical specific-contact resistivity (5.32 × 10^?4 Ω cm²) of the Ag/Ni bilayer requires further modification for development of high-efficiency polycrystalline SnSe thermoelectric modules.     

An Intelligent Product Recommendation Model to Reflect the Recent Purchasing Patterns of Customers

Mobile Networks and Applications - This study suggests a new product recommendation model to reflect the recent purchasing patterns of customers. There are many methods to measure the similarity...     

Inverse modeling and its application in the design of high electronmobility transistors

An inverse modeling technique is introduced to determine the structural and physical parameters of HEMT from the desired data for maximum transconductance. The technique is based on the availability of analytical expressions describing the electron carrier concentration, the current, the transconductance, the capacitances and the unity current gain frequency of a HEMT. Empirical formulae are obtained that relate the maximum transconductance to the doped AlGaAs thickness, spacer layer thickness, dopant density and aluminum mole fraction. The technique is applied to the design of a HEMT and shows good agreement with the experimental data     

A Multi‐Functional Highly Efficient Upconversion Luminescent Film with an Array of Dielectric Microbeads Decorated with Metal Nanoparticles

Upconversion nanoparticles (UCNPs) have been integrated with photonic platforms to overcome the intrinsically low quantum efficiency limit of upconversion luminescence (UCL). However, platforms based on thin films lack transferability and flexibility, which hinders their broader and more practical application. A plasmonic structure is developed that works as a multi‐functional platform for flexible, transparent, and washable near‐infrared (NIR)‐to‐visible UCL films with ultra‐strong UCL intensity. The platform consists of dielectric microbeads decorated with plasmonic metal nanoparticles on an insulator/metal substrate. Distinct improvements in NIR confinement, visible light extraction, and boosted plasmonic effects for upconversion are observed. With weak NIR excitation, the UCL intensity is higher by three orders of magnitude relative to the reference platform. When the microbeads are organized in a square lattice array, the functionality of the platform can be expanded to wearable and washable UCL films. The platform can be transferred to transparent, flexible, and foldable films and still emit strong UCL with a wide viewing angle.     

Latch Applicator for Efficient Delivery of Dissolving Microneedles Based on Rapid Release of Elastic Strain Energy by Thumb Force (Adv. Funct. Mater. 11/2023)

Dissolving microneedle (DMN) is an attractive alternative to parenteral and enteral drug administration owing to its painless self-administration and safety due to non-generation of medical waste. For reproducible and efficient DMN administration, various DMN application methods, such as weights, springs, and electromagnetic devices, have been studied. However, these applicators have complex structures that are complicated to use and high production costs. In this study, a latch applicator that consists of only simple plastic parts and operates via thumb force without any external complex device is developed. Protrusion-shaped latches and impact distances are designed to accumulate thumb force energy through elastic deformation and to control impact velocity. The optimized latch applicator with a pressing force of 25 N and an impact velocity of 5.9 m s⁻¹ fully inserts the drug-loaded tip of the two-layered DMN into the skin. In an ovalbumin immunization test, DMN with the latch applicator shows a significantly higher IgG antibody production rate than that of intramuscular injection. The latch applicator, which provides effective DMN insertion and a competitive price compared with conventional syringes, has great potential to improve delivery of drugs, including vaccines.     

Investigation of 4H-SiC MOS capacitors annealed in diluted N2O at different temperatures

Thermally grown oxide on 4H-SiC has been post-annealed in diluted N₂O (10% N₂O in N₂) at different temperatures from 900 to 1100 °C. The quality of the nitrided oxide and the SiO₂/4H-SiC interface was investigated by AC conductance and high frequency C-V measurements based on Al/SiO₂/4H-SiC metal-insulator-semiconductor (MOS) structure. It is found that N₂O annealing at 1000 °C produces the lowest interface state density, though the difference is not so significant when compared to the other samples annealed at 900 and 1100 °C. These results can be explained by the high temperature dynamic decomposition process of N₂O. By fitting the AC conductance data, it is found that higher temperature nitridation increases the capture cross-section of the interface traps.     

A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications

A fractional-N frequency synthesizer (FNFS) in a 0.5-/spl mu/m SiGe BiCMOS technology is implemented. In order to operate in a wide-band frequency range, a switched-capacitors bank LC tank voltage-controlled oscillator (VCO) and an adaptive frequency calibration (AFC) technique are used. The measured VCO tuning range is as wide as 600 MHz (40%) from 1.15 to 1.75 GHz with a tuning sensitivity from 5.2 to 17.5 MHz/V. A 3-bit fourth-order /spl Sigma/-/spl Delta/ modulator is used to reduce out-of-band phase noise and to meet a frequency resolution of less than 3 Hz as well as agile switching time. The experimental results show -80 dBc/Hz in-band phase noise within the loop bandwidth of 25 kHz and -129 dBc/Hz out-of-band phase noise at 400-kHz offset frequency. The fractional spurious is less than -70 dBc/Hz at 300-kHz offset frequency and the reference spur is -75 dBc/Hz. The lock time is less than 150 /spl mu/s. The proposed synthesizer consumes 19.5 mA from a single 2.8-V supply voltage and meets the requirements of GSM/GPRS/WCDMA applications.     

A 0.5-8.5 GHz fully differential CMOS distributed amplifier

A fully integrated fully differential distributed amplifier with 5.5 dB pass-band gain and 8.5 GHz unity-gain bandwidth is described. The fully differential CMOS circuit topology yields wider bandwidth than its single-ended counterpart, by eliminating the source degeneration effects of parasitic interconnect, bond wire, and package inductors. A simulated annealing CAD tool underpins the parasitic-aware methodology used to optimize the design including all on-chip active and passive device and off-chip package parasitics. Mixed-mode S-parameter measurement techniques used for fully differential circuit testing are reviewed. Integrated in 1.3/spl times/2.2 mm/sup 2/ in a standard 0.6 /spl mu/m CMOS process, the distributed amplifier dissipates 216 mW from a single 3 V supply.     

Fast full search motion estimation algorithm using early detection of impossible candidate vectors

To reduce the amount of computations for a full search (FS) algorithm for fast motion estimation, we propose a new and fast FS motion estimation algorithm. The computational reduction of our FS motion estimation algorithm comes from fast elimination of impossible motion vectors. We obtain faster elimination of inappropriate motion vectors using efficient matching units from localization of a complex area in image data. In this paper, we show three properties in block matching of motion estimation. We suggest two fast matching scan algorithms: one from adaptive matching scan and the other from fixed dithering order. Experimentally, we remove the unnecessary computations by about 30% with our proposed algorithm compared with the conventional fast FS algorithms.     

A 2-Gbaud 0.7-V swing voltage-mode driver and on-chip terminatorfor high-speed NRZ data transmission

A large-swing, voltage-mode driver and an on-chip termination circuit are presented for high-speed nonreturn-to-zero (NRZ) data transmission through a copper cable. The proposed driver with active pull-up and pull-down can generate a 700-mV signal to deliver a 2 Gbaud serial NRZ data stream. Low output impedance offered by simple negative-feedback resistors alleviates the detrimental effect of the parasitic capacitance by supplying fast current impulses. A proposed on-chip termination circuit provides termination impedance to a mid-supply termination voltage with the benefit of reduced parasitic capacitance and better termination characteristics compared with off-chip termination. The driver and termination circuits have been incorporated in a 2 Gbaud transceiver chip and fabricated in 0.35 μm CMOS technology. Measurements show a 1.4 V differential swing with a slew rate of 2.5 V/ns at the receiver output and a 65% reduction of reflection by the on-chip termination circuit with power consumption of 191 mW at 3.3 V supply