基于多光刻胶有效扩散长度的光学临近效应修正模型校准方法

提出了基于多光刻胶有效扩散长度的光学临近效应修正模型校准方法,其考虑了一维和二维图形之间光刻胶有效扩散长度的不同. 该方法的一个重要步骤在于建立起全新的校准流程,使得一维图形和二维图形具有相同的光学参数和不同的光刻胶有效扩散长度. 另外,在该模型校准流程中提出了一种基于可制造性设计理念的交互. 从校准结果的关键尺寸误差及仿真轮廓和扫描电子显微镜图像的对比来看,基于多光刻胶有效扩散长度的光学临近效应修正模型校准方法的输出模型更加精确和稳定.     

LDMOS射频晶体管满足2.5G和3G蜂窝基站的新挑战

迄今为止,运行在869～2.17GHz频段内的蜂窝无线基站是射频功率晶体管最大的市场。其中,基于硅的LDMOS器件被广泛使用在500～2.5GHz之间的射频功率放大器应用当中。作为增强模式的N沟道MOSFET,LDMOS器件(LD代表侧面扩散,描述了器件的沟道结构)专门被设计成为具有高工作电压(长沟道)和低寄生电容,从而能在高频下工作。在早期的蜂窝无线系统中,其它的功率晶体管技术如基于硅的双极器件(bipolar)和GaAsMOSFET在相互竞争。现在基于硅的LDMOS已经崛起,并将在今后的蜂窝基站应用中取代其他技术成为市场主流。针对蜂窝基站应用的大功…     

用2.5D TSV实现多处理器SiP功能

本项目由Open-Silicon,GLOBALFOUNDRI ES和Amkor三家公司合作完成。两颗28nm的ARM处理器芯片,通过2.5D硅转接板实现集成。芯片的高性能集成通常由晶体管制程提高来实现,应用2.5D技术的Si P正成为传统芯片系统集成的有效替代。Open-Silicon负责芯片和硅转接板的设计,重点在于性能优化和成本降低。GLOBALFOUNDRI ES采用28nm超低能耗芯片工艺制造处理器芯片,而用65nm技术制造2.5D硅转接板。包括功耗优化和功能界面有效管理等概念得到验证。硅基板的高密度布线提供大量平行I/O,以实现高性能存储,并保持较低功耗。所开发的EDA设计参考流程可以用于优化2.5D设计。本文展示了如何将大颗芯片重新设计成较小的几颗芯片,通过2.5D硅转接板实现Si P系统集成,以降低成本,提高良率,增加设计灵活性和重复使用性,并减少开发风险。     

Nonrigid coregistration of diffusion tensor images using a viscous fluid model and mutual information

In this paper, a nonrigid coregistration algorithm based on a viscous fluid model is proposed that has been optimized for diffusion tensor images (DTI), in which image correspondence is measured by the mutual information criterion. Several coregistration strategies are introduced and evaluated both on simulated data and on brain intersubject DTI data. Two tensor reorientation methods have been incorporated and quantitatively evaluated. Simulation as well as experimental results show that the proposed viscous fluid model can provide a high coregistration accuracy, although the tensor reorientation was observed to be highly sensitive to the local deformation field. Nevertheless, this coregistration method has demonstrated to significantly improve spatial alignment compared to affine image matching.     

A review of large-vocabulary continuous-speech

Considerable progress has been made in speech-recognition technology and nowhere has this progress been more evident than in the area of large-vocabulary recognition (LVR). Laboratory systems are capable of transcribing continuous speech from any speaker with average word-error rates between 5% and 10%. If speaker adaptation is allowed, then after 2 or 3 minutes of speech, the error rate will drop well below 5% for most speakers. LVR systems had been limited to dictation applications since the systems were speaker dependent and required words to be spoken with a short pause between them. However, the capability to recognize natural continuous-speech input from any speaker opens up many more applications. This article discusses the principles and architecture of LVR systems and identifies the key issues affecting their future deployment. To illustrate the various points raised, the Cambridge University HTK system is described. This system is a modern design that gives state-of-the-art performance, and it is typical of the current generation of recognition systems     

The design of wave digital filters using fully pipelined bit-level systolic arrays

Wave digital filters (WDF) based on analogue lattice and unit element cascade networks possess important properties that make them suitable for VLSI integration. These include low round-off noise even with short coefficient wordlength and a building block (two-port adaptor) with a very simple structure. Exploiting these properties leads to area efficient designs. Systolic architectures for these WDF networks give the additional advantage of very high sampling rates with potential application in sonar and video signal processing. The bit-level systolic array design of two WDFs is considered in detail, beginning at the filter specification and ending at the VLSI hardware architecture, with discussion of the expected values of the integrated circuit parameters.     

Paged Absolute Addressing Mode Optimizations for Embedded Digital Signal Processors Using Post-pass Data-flow Analysis

We address the problem of code generation for embedded DSP systems. In such systems, it is typical for one or more digital signal processors (DSPs), program memory, and custom circuitry to be integrated onto a single IC. Consequently, the amount of silicon area that is dedicated to program memory is limited, so the embedded software must be sufficiently dense. Additionally, this software must be written so as to meet various high-performance constraints, which may include hard real-time constraints. Unfortunately, existing compiler technology is unable to generate dense, high-performance code for DSPs since it does not provide adequate support for the specialized architectural features of DSPs. These specialized features not only allow for the fast execution of common DSP operations, but they also allow for the generation of dense assembly code that specifies these operations. Thus, system designers often hand-program the embedded software in assembly, which is a very time-consuming task. In this paper, we focus on providing compiler support for one particular specialized architectural feature, namely the paged absolute addressing mode – this feature is found in two commercial DSPs, the Texas Instruments' TMS320C25 and TMS320C50 fixed-point DSPs; however, it may also be featured in application-specific processors (ASIPs). We present some machine-dependent code optimizations that improve code density by exploiting this architectural feature. Experimental results demonstrate that for a set of typical DSP benchmarks, some of our optimizations reduce overall code size and data memory consumption by an average of 5.0% and 16.0%, respectively. Our experimental vehicle throughout this research is the TMS320C25.     

Development of a comprehensive plan for utilization of digester gas moves towards energy self-sufficiency in Chicago, USA

The Metropolitan Water Reclamation District (MWRD) of Greater Chicago's Stickney Water Reclamation Plant (SWRP) anaerobically digests approximately 430 dry tons per day (dtpd) (390 dry metric tons per day) of solids and produces 3.4 million ft(3)/day (96 thousand m(3)/day) of biogas from the anaerobic digesters, making it one of the largest municipal digester gas complexes in the world. Installation of new treatment processes, as well as future increases in flows and loads to the plant, are expected to significantly increase production of biologically degradable sludge and biogas. This paper presents a comprehensive planning study that was completed to identify and evaluate alternatives for utilization of this biogas. The best, sustainable approach was identified, taking into consideration economics, social impacts, and environmental impacts. The model results indicate that the most economically favorable scenario involves installing a cogeneration facility to produce electricity on-site, and operating it in conjunction with the plant's existing boilers to satisfy the heating needs of the plant. This scenario also provides the greatest reduction in GHG offsets at the power plants.     

The Pebble Bed Modular Reactor: An obituary

The High Temperature Gas-cooled Reactor (HTGR) has exerted a peculiar attraction over nuclear engineers. Despite many unsuccessful attempts over half a century to develop it as a commercial power reactor, there is still a strong belief amongst many nuclear advocates that a highly successful HTGR technology will emerge. The most recent attempt to commercialize an HTGR design, the Pebble Bed Modular Reactor (PBMR), was abandoned in 2010 after 12 years of effort and the expenditure of a large amount of South African public money. This article reviews this latest attempt to commercialize an HTGR design and attempts to identify which issues have led to its failure and what lessons can be learnt from this experience. It concludes that any further attempts to develop HTGRs using Pebble Bed technology should only be undertaken if there is a clear understanding of why earlier attempts have failed and a high level of confidence that earlier problems have been overcome. It argues that the PBMR project has exposed serious weaknesses in accountability mechanisms for the expenditure of South African public money.     

Missing carbon reductions? Exploring rebound and backfire effects in UK households

Households are expected to play a pivotal role in reducing the UK's greenhouse gas (GHG) emissions, and the UK Government is encouraging specific household actions to help meet its targets. However, due to the rebound effect, only a portion of the GHG emission reductions estimated by simple engineering calculations are generally achieved in practice. For example, replacing short car journeys by walking or cycling reduces consumption of motor fuels. But this frees up money that may be spent on, for example, purchasing extra clothes or flying on vacation. Alternatively, the money may be put into savings. Since all of these options lead to GHG emissions, total GHG savings may be less than anticipated. Indeed, in some instances, emissions may increase—a phenomenon known as ‘backfire’. We estimate that the rebound effect for a combination of three abatement actions by UK households is approximately 34%. Targeting re-spending on goods and services with a low GHG intensity reduces this to a minimum of around 12%, while re-spending on goods and services with a high GHG intensity leads to backfire. Our study highlights the importance of shifting consumption to lower GHG intensive categories and investing in low carbon investments.