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71.
Shuich Fujii Yuko Fukawa Hiroaki Takahashi Yosuke Inomata Kenichi Okada Kenji Fukui Katsuhiko Shirasawa 《Solar Energy Materials & Solar Cells》2001,65(1-4)
In 1996 a conversion efficiency of 17.1% had been obtained on 15 cm×15 cm mc-Si solar cell. In this paper, large-scale production technology of the high-efficiency processing will be discussed. Enlarging reactive ion etching (RIE) equipment size, technology of passivation, and fine contact grid with low resistance by screenprinted metallization, which is firing through PECVD SiN, have been investigated. 相似文献
72.
Strong demand for improving thermal efficiency of power generation plants promoted the use of high-chromium steels, which have high creep strength and corrosion resistance. Aiming at cost reduction for future nuclear power plants, these materials are also regarded as candidates for structural materials, being favoured for lower thermal expansion rate compared with austenitic stainless steels. In structural design and life management of these plants, failure due to the combination of fatigue and creep damages has been considered as an important phenomenon to be evaluated, in addition to simple creep failure under sustained loading such as inner pressure. The author has been conducting a series of creep-fatigue tests for three types of high-chromium steels used in fossil power plants and the applicability of life prediction methods has been studied. It was found that the time fraction rule gives a relatively small amount of creep damage and overpredicts the failure life, whereas a simple ductility exhaustion method provides very large creep damage which leads to too conservative prediction of failure lives. A modified ductility exhaustion method developed on the re-definition of creep damage as a ductility consumer gave a moderate amount of creep damage and provided reasonable life predictability. Moreover, an empirical formula was derived which can represent the life reduction in compressive hold tests as a function of pure fatigue life and hold time. 相似文献
73.
Takahashi Y. Nakano H. Saito T. 《Circuits and Systems II: Express Briefs, IEEE Transactions on》2004,51(9):468-472
This paper studies a simple hyperchaos generator. The circuit consists of three capacitors, three voltage-controlled current sources, and one state-dependent impulsive switch. The circuit dynamics are described by a normal form equation and a two-dimensional noninvertible return map is derived. The return map is calculated precisely using the exact piecewise solution and hyperchaos generation is guaranteed by two positive Lyapunov exponents of the return map. Using a simple test circuit, a typical hyperchaotic attractor can be verified in the laboratory. 相似文献
74.
Yamada J. Miwa T. Koike H. Toyoshima H. Amanuma K. Kobayashi S. Tatsumi T. Maejima Y. Hada H. Mori H. Takahashi S. Takeuchi H. Kunio T. 《Solid-State Circuits, IEEE Journal of》2002,37(8):1073-1079
This paper describes a 128-kb FeRAM macro for smart-card microcontrollers. This macro, which was designed and fabricated using a 0.35-/spl mu/m three-metal CMOS and a Capacitor-on-Metal/Via-stacked-Plug (CMVP) process technology, is ideally suited for recent system LSIs such as smart-card microcontrollers. It has a flexible memory size ranging from 32 to 128 kb, a low consumption current of 0.3 mA, and endurance of more than 10/sup 8/ write/read cycles under a wide range of supply voltages, from 2.7 to 5.5 V. These characteristics, which are required of not only contact-type smart-card microcontrollers but also contactless-type ones, were achieved by using four newly developed circuit technologies: 1) a three-metal CMVP memory cell; 2) a voltage-regulating architecture; 3) a main/sub bitline and wordline structure; and 4) a dynamic-type offset sense amplifier. 相似文献
75.
S. Kamei K. Iemura A. Kaneko Y. Inoue T. Shibata H. Takahashi A. Sugita 《Photonics Technology Letters, IEEE》2005,17(3):588-590
We describe a compact 1.5%-/spl Delta/ athermal silica-based 100-GHz-spacing 16-channel arrayed-waveguide grating (AWG) multi/demultiplexer with a modified groove design for a very low excess loss. We propose new approaches for modifying the shape of the grooves and the arrayed waveguides and optimize the shape modifications for 1.5%-/spl Delta/ waveguides. By employing this modified groove design, we greatly reduced the groove excess loss from 1.9 to 0.4 dB in the 1.5%-/spl Delta/ athermal AWG. 相似文献
76.
Kamei S. Inoue Y. Mizuno T. Shibata T. Kaneko A. Takahashi H. Iemura K. 《Electronics letters》2005,41(9):544-546
A silica-based 1.5%-/spl Delta/ 100 GHz-spacing 32-channel athermal arrayed-waveguide grating (AWG) with compact size and extremely low insertion loss is described. By reducing the fibre coupling loss and the excess loss in a silicone-filled groove, an insertion loss of 1.3 dB was achieved with this athermal AWG. 相似文献
77.
Photonic A/D conversion using low-temperature-grown GaAs MSM switches integrated with Si-CMOS 总被引:1,自引:0,他引:1
Urata R. Nathawad L.Y. Takahashi R. Kai Ma Miller D.A.B. Wooley B.A. Harris J.S. Jr. 《Lightwave Technology, Journal of》2003,21(12):3104-3115
By linking the unique capabilities of photonic devices with the signal processing power of electronics, photonically sampled analog-to-digital (A/D) conversion systems have demonstrated the potential for superior performance over all-electrical A/D conversion systems. We adopt a photonic A/D conversion scheme using low-temperature (LT)-grown GaAs metal-semiconductor-metal (MSM) photoconductive switches integrated with Si-CMOS A/D converters. The large bandwidth of the LT GaAs switches and the low timing jitter and short width of mode-locked laser pulses are combined to accurately sample input frequencies up to several tens of gigahertz. CMOS A/D converters perform back-end digitization, and time-interleaving is used to increase the total sampling rate of the system. In this paper, we outline the development of this system, from optimization of the LT GaAs material, speed and responsivity measurements of the switches, bandwidth and linearity characterization of the first-stage optoelectronic sample-and-hold, to integration of the switches with CMOS chips. As a final proof-of-principle demonstration, a two-channel system was fabricated with LT GaAs MSM switches flip-chip bonded to CMOS A/D converters. When operated at an aggregate sampling rate of 160 megasamples/s, the prototype system exhibits /spl sim/3.5 effective number of bits (ENOB) of resolution for input signals up to 40 GHz. 相似文献
78.
Kazufumi Yogo Ryoichi Shinkuma Taku Konishi Satoko Itaya Shinichi Doi Keiji Yamada Tatsuro Takahashi 《International Journal of Network Management》2012,22(1):1-11
We have developed an incentive‐rewarding mechanism that stimulates activities in social networking services (SNSs), including content uploading and link establishment. We particularly focus on changing the reward assignment ratio based on the different risks users perceive when uploading content with different privacy settings: public‐open and friend‐limited. Learning‐based simulation allowed us to observe that SNS activity, which we measured as the amount of browsed content within a certain period, can be controlled by a rewarding assignment ratio. We then analyzed how the amount of uploaded content and the increase of established links affect SNS activity. Results suggested that the optimal reward assignment ratio to maximize SNS activity changes depending on the total amount of available reward resources. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
79.
Ya Nan Ye Martin Frauenlob Lei Wang Masumi Tsuda Tao Lin Sun Kunpeng Cui Riku Takahashi Hui Jie Zhang Tasuku Nakajima Takayuki Nonoyama Takayuki Kurokawa Shinya Tanaka Jian Ping Gong 《Advanced functional materials》2018,28(31)
Tough and self‐recoverable hydrogel membranes with micrometer‐scale thickness are promising for biomedical applications, which, however, rarely be realized due to the intrinsic brittleness of hydrogels. In this work, for the first time, by combing noncovalent DN strategy and spin‐coating method, we successfully fabricated thin (thickness: 5–100 µm), yet tough (work of extension at fracture: 105–107 J m?3) and 100% self‐recoverable hydrogel membranes with high water content (62–97 wt%) in large size (≈100 cm2). Amphiphilic triblock copolymers, which form physical gels by self‐assembly, were used for the first network. Linear polymers that physically associate with the hydrophilic midblocks of the first network, were chosen for the second network. The inter‐network associations serve as reversible sacrificial bonds that impart toughness and self‐recovery properties on the hydrogel membranes. The excellent mechanical properties of these obtained tough and thin gel membranes are comparable, or even superior to many biological membranes. The in vitro and in vivo tests show that these hydrogel membranes are biocompatible, and postoperative nonadhesive to neighboring organs. The excellent mechanical and biocompatible properties make these thin hydrogel membranes potentially suitable for use as biological or postoperative antiadhesive membranes. 相似文献
80.
Suzuki T. Kawano Y. Nakasha Y. Yamaura S. Takahashi T. Makiyama K. Hirose T. 《Solid-State Circuits, IEEE Journal of》2007,42(3):637-646
A full-rate multiplexer (MUX) with a multiphase clock architecture for over 40 Gbit/s optical communication systems is presented. The 4:1 MUX is comprised of a re-timer based on a D-type flip-flop (DFF) and a clock tree system that uses EXOR-type delay buffers to match its skews well to those of the data. The supply voltage is reduced to -1.5 V by analyzing the voltage allocation. Fabricated in a 0.13-mum InP HEMT technology, a DFF test circuit achieved 75-Gbit/s operation and exhibited performance sufficient to re-time 50-Gbit/s serialized data. The 4:1 MUX measurement results demonstrate successful 50-Gbit/s operation at room temperature, and 40-Gbit/s operation, which has 10-11 error free for 231 - 1 pseudorandom bit stream (PRBS) data, up to an ambient temperature of 90 degrees or down to - 1.24 V of supply voltage. The circuit consumes 450 mW at a - 1.5-V supply and exhibits an output jitter of 283 fs rms at 50-Gbit/s operation. We also propose a multiphase clock generator for a MUX that has a serialization of more than four channels 相似文献