Straight-through microchannel devices for generating monodisperse emulsion droplets several microns in size

The authors recently proposed a promising technique for producing monodisperse emulsions using a straight-through microchannel (MC) device composed of an array of microfabricated oblong holes. This research developed new straight-through MC devices with tens of thousands of oblong channels of several microns in size on a silicon-on-insulator plate, and investigated the emulsification characteristics using the microfabricated straight-through MC devices. Monodisperse oil-in-water (O/W) and W/O emulsions with average droplet diameters of 4.4–9.8 μm and coefficients of variation of less than 6% were stably produced using surface-treated straight-through MC devices that included uniformly sized oblong channels with equivalent diameters of 1.7–5.4 μm. The droplet size of the resultant emulsions depended greatly on the size of the preceding oblong channels. The emulsification process using the straight-through MC devices developed in this research had very high apparent energy efficiencies of 47–60%, defined as (actual energy input applied to droplet generation/theoretical minimum energy input necessary for making droplets) × 100. Straight-through MC devices with numerous oblong microfluidic channels also have great potential for increasing the productivity of monodisperse fine emulsions.     

Essence of generalized partial computation

Generalized partial computation (GPC) is a program optimization principle based on partial computation and theorem proving. Conventional partial computation methods (or partial evaluators) explicitly make use of only given parameter values to partially evaluate programs. However, GPC explicitly utilizes not only given values but also the following information: (1) logical structure of a program to be partially evaluated; (2) abstract data type of a programming language. The main purpose of this paper is to present comprehensible examples of GPC. Graphical notations, called GPC trees, are introduced to visibly describe GPC processes.     

Antiferromagnetic Order in the Ladder Compound SrCu2O3; Cu-NMR/NQR Measurements

We carried out the extensive Cu-nuclear magnetic and quadrupole resonance (NMR/NQR) experiments on the Zn(Ni)-doped ladder compound SrCu ₂ O ₃ (Sr123), Sr(Cu _1–x M _x ) ₂ O ₃ (M=Zn and Ni) with x 0.02 and the Ladoped Sr123, Sr _1–x La _x Cu ₂ O ₃ with x 0.03. A spin-correlation length _s /a (a: the lattice spacing between the Cu sites along the leg) of nonmagnetic impurity-induced staggered polarization (IISP) estimated from a quasi-one-dimensional (Q1D) IISP along the two legs in the 0.1–2 % Zn-doped Sr123 was found to be independent of temperature (T) and scaled to an mean impurity distance D _AV with the relation of _s /a = 2.5 + 0.1D _AV The _s /a's are much longer in x = 0.001 ( _s /a 50) and 0.005 ( _s /a 12) than an instantaneous spin-correlation length ₀ /a 3 – 8 in Sr123. The formula of Néel T, T _N (WC-Q1D)=J exp(–D _AV /(_s/a)) (J = 2000 K) based on the weakly interladder-coupled (WC) Q1D model explains the experimental T _N values quantitatively.     

Numerical prediction of sound generated from flows with a low Mach number

Numerical computations of sound generated from flows with a low Mach number are presented based on Lighthill’s acoustic analogy with an assumption that sound does not alter the flow field from which it is generated. The source fluctuations of the flow field are computed by a large-eddy simulation (LES) with Dynamic Smagorinsky Model (DSM) and they are fed to the following acoustical computation as input data. An explicit/implicit finite element method with second order accuracy both in time and space is used for flow field discretization. The method is applied to the prediction of sound in three different classes of problems: far-field sound generated from flow around a bluff body, sound resulting from blade-stator interaction of turbomachinery and sound due to a turbulent boundary layer on an aerofoil. The computed frequency spectra of the sound show a fairly good agreement with the measured spectra for all the cases.     

Wordline voltage generating system for low-power low-voltage flashmemories

A low-power wordline voltage generating system is developed for low-voltage flash memories. The limit for the stand-by current including the operation current for the band-gap reference and the stand-by wordline voltage generator is discussed. The system was implemented on a 1.8-V 32-Mb flash memory fabricated with a 0.25-μm flash memory process and achieved with very low stand-by current of 2 μA typically, and high operating frequency of 25 MHz in read operation at 1.8 V. A low-voltage level shifter with high-speed switching is also proposed     

Annealing behavior of (Pu,Cm)O2 lattice and bulk expansion from self-irradiation damage

In order to investigate the effect of self-irradiation damage and accumulation of He on oxide fuel pellets containing minor actinides, the expansion and annealing behavior of (Pu_0.95Cm_0.05)O₂ lattice and bulk were examined comparatively. Since the lattice and bulk expansion at room temperature showed a similar dependence on the storage duration, the main factor of bulk expansion was found to be the lattice expansion due to the generation of point defects. The lattice parameter recovered to the undamaged value by annealing at 1429 K for 2 h, whereas the bulk expanded again by annealing at 1433 K and did not recover to the undamaged value. In the micrographs of the fracture surface of the annealed pellet, the formation of gas bubbles along grain boundaries was confirmed. The He gas bubble formation resulted in the pellet swelling, and it may affect the pellet thermal conduction.     

One-chip GaAs monolithic frequency converter operable to 4 GHz

The frequency converter combines a feedback amplifier, a differential amplifier, a double-balanced mixer, a voltage-controlled oscillator, and an IF amplifier on a 1-mm² GaAs chip. The FET circuits were matched by digital IC design rather than by the distributed element network technique, to use the substrate more effectively. Self-aligned WSi/Au gates 1.5 μm long were used, and the resistance in conventional WSi gates was reduced to enhance microwave characteristics. At 4 GHz, the conversion gain is 18 dB, the double-sideband noise is 11.8 dB and the output power is 5.6 dBm     

Applications of microstructures fabricated by proton beam writing to electric-micro filters

Fabrication of high-aspect-ratio microstructures was performed by proton beam writing (PBW) using a microbeam line at Takasaki Ion Accelerators for Advanced Radiation Application (TIARA), JAEA Takasaki, JAPAN. As one of the applications of the high-aspect-ratio structures micro-machined by PBW, we utilized the high-aspect pillars for electric-micro filters of microbes such as Escherichia coli and Yeast based on the dielectrophoretic force. The filter is equipped with high-aspect pillars with a height of ～20 μm and a diameter of ～1 μm on a glass plate. Evaluation of the dielectrophoresis (DEP) device for capturing E. coli and Yeast was made using either observation by optical microscope or photoluminescence (PL) measurements.     

High-speed DCFL circuits with very shallow junction GaAs JFETs

High-speed DCFL (direct-coupled FET logic) circuits implemented with advanced GaAs enhancement-mode J-FETs are discussed. A divide-by-four static frequency divider operates at up to 6 GHz with a power consumption of 20 mW/flip-flop. A high channel concentration of more than 1×10¹⁸ cm^-3 together with a very shallow junction depth of less than 30 nm for the p⁺-gate results in a transconductance as high as 340 mS/mm at a gate length of 0.8 μm. Open-tube diffusion of Zn using diethylzinc and arsine makes it possible to control a very shallow p⁺-layer less than 10 nm thick. The propagation delay time, as measured with a ring oscillator, was 22 ps/gate with a power consumption of 0.42 mW/gate     

A 60-ns 16-Mbit DRAM with a minimized sensing delay caused by bit-line stray capacitance

Discusses three new techniques that were implemented in a CMOS 60-ns 16-Mbit DRAM device. (1) A two-step half-conductive-state technique was used to control the conductivity of latch transistors, thus minimizing the time delay caused by bit-line stray capacitance. (2) The 'split-block row decoder' technique enabled the decoder layout within the 2.9- mu m cell pitch required for 16-Mbit integration density. The three transistors that are required per word line were split into two and one, placed on both sides of each word line, and alternately reversed on each side of the 2-Mbit cell array. (3) Additional dummy cells were added to the vacant spaces resulting from use of a twisted bit-line architecture, which reduces stray capacitance between adjacent bit lines. The overhead space required for all the dummy cells and twisted bit lines was thus held at 2.6 percent of the entire chip area.<>