Parallel reduced area multipliers

As developed by Wallace and Dadda, a method for high-speed, parallel multiplication is to generate a matrix of partial products and then reduce the partial products to two numbers whose sum is equal to the final product. The resulting two numbers are then summed using a fast carry-propagate adder. This paper presents Reduced Area multipliers, which employ a modified reduction scheme that results in fewer components and less interconnect overhead than either Wallace or Dadda multipliers. This reduction scheme is especially useful for pipelined multipliers, because it minimizes the number of latches required in the reduction of the partial products. The reduction scheme can be applied to either unsigned (sign-magnitude) or two's complement numbers. Equations are given for determining the number of components and a method is presented for estimating the interconnect overhead for Wallace, Dadda, and Reduced Area multipliers. Area estimates indicate that for non-pipelined multipliers, the reduction in area achieved with Reduced Area multipliers ranges from 3.7 to 6.6 percent relative to Dadda multipliers, and from 3.8 to 8.4 percent relative to Wallace multipliers. For fully pipelined multipliers, the reduction in area ranges from 15.1 to 33.6 percent relative to Dadda multipliers, and from 2.9 to 9.0 percent relative to Wallace multipliers.     

波束扫描合成孔径雷达成像处理

本文主要研究了滤束扫描合成孔径雷达的杨像处理方法，分析了ＳＣＡＮＳＡＲ的工作原理、信号格式、信号结构和信号参数限制，成像处理算法包括块数据成像算法和块图像拼接算法两部分，频谱分析法和时域频域混合相关法被用于数据成像，块图像的拼接是利用时间有系剪裁块图像再顺次拼接，计算机仿真验证了本文提出的ＳＣＡＮＳＡＲ信号格式和成像算法的可行性。     

Synthesis, characteristics and oxygen-sensitive properties of SrMgxTi 1 − xO3 nanocrystals

SrMg_xTi_{1 - x}O₃ nanocrystals (x = 0.1–0.6) were synthesized by the stearic acid gel method. Powder samples were characterized by X-ray diffraction and X-ray photoelectron (XP) spectroscopy. The results showed that the lattice parameter a and the O 1s XP spectrum changed not only with the Mg content x but also with the grain size d of the samples. The conductivity of a thick film specimen fabricated on an aluminium oxide wafer was investigated in a nitrogen—oxygen atmosphere.     

Improved method for HgI2 crystal growth and detector fabrication

Instead of the temperature oscillation method (TOM), a modified vapor growth method was applied in this paper to grow large HgI₂ crystals with fewer lattice defects by providing a relatively stable temperature field during growth. And a new processing technique of HgI₂ crystals was developed for detector fabrication by merging solution string-sawing and hand-cleaving. The lattice deformations caused during cleaving were reduced greatly by eliminating passivated layers on the sawed crystal platelets before cleaving.     

On the Realization of Current－Mode Continuous－Time Operational Transconductance Capacitance Filter

ＯｎｔｈｅＲｅａｌｉｚａｔｉｏｎｏｆＣｕｒｒｅｎｔ－ＭｏｄｅＣｏｎｔｉｎｕｏｕｓＴｉｍｅＯｐｅｒａｔｉｏｎａｌＴｒａｎｓｃｏｎｄｕｃｔａｎｃｅＣａｐａｃｉｔａｎｃｅＦｉｌｔｅｒ￥ＧｕｏＪｉｎｇｂｏａｎｄＨａｎＱｉｎｇｑｕａｎ（ＣｈａｎｇｃｈｕｎＰｏｓ...     

适合航天电子系统应用的DC－DC变换器

讨论了航天ＤＣ－ＤＣ混合集成电路的拓朴结构。通过对几种电路的性能比较，提出了适合航天应用的ＤＣ－ＤＣ变换器的最佳拓朴结构。论述了ＰＷＭ－ＬＩＮ变换器的控制方法，该方法对于确保二次稳压ＤＣ－ＤＣ变换器较高的效率具有重要意义，亦可大大提高混合集成电路的成品率。     

1μm宽硅深槽刻蚀技术

介绍了硅深槽刻蚀的基本原理和影响刻蚀效果的几个主要工艺因素。提出了一种实现１μｍ宽的硅深槽刻蚀工艺途径；并给出了１μｍ宽、８μｍ深、侧壁及底部光洁的硅深槽刻蚀工艺条件。     

一种提高微电路外壳使用可靠性的方法

简要分析了白瓷双列直插外壳的失效模式和失效机理，并进行了模拟实验，通过对实验结果的分析，提出对成品微电路进行二次电镀能够提高其外壳的使用可靠性。     

全耗尽CMOS／SOI技术的研究进展

ＳＯＩ材料技术的成熟，为功耗低，抗干扰能力强，集成度高，速度快的ＣＭＯＳ／ＳＯＩ器件的研制提供了条件，分析比较了ＣＭＯＳ／ＳＯＩ器件与体硅器件的差异，介绍了国外薄膜全耗尽ＳＯＩ技术的发展和北京大学微电子所的研究成果。     

VHDL逻辑综合及FPGA实现

运用ＶＨＤＬ语言描述了一个１２×１２位的高速补码阵列乘法器。重点是运用ＶＨＤＬ逻辑综合优化该乘法器，并进行了乘法器的ＸｉｌｉｎｘＦＰＧＡ实现、功能仿真和时序仿真。经选用ＸＣ４００５ＰＣ－８４－４芯片进行验证，证明了其正确性