首页 | 本学科首页   官方微博 | 高级检索  
文章检索
  按 检索   检索词:      
出版年份:   被引次数:   他引次数: 提示:输入*表示无穷大
  收费全文   707322篇
  免费   9371篇
  国内免费   1667篇
电工技术   12888篇
综合类   575篇
化学工业   112916篇
金属工艺   29170篇
机械仪表   22223篇
建筑科学   17347篇
矿业工程   4984篇
能源动力   18393篇
轻工业   58657篇
水利工程   8262篇
石油天然气   16541篇
武器工业   42篇
无线电   75105篇
一般工业技术   140866篇
冶金工业   123752篇
原子能技术   17032篇
自动化技术   59607篇
  2021年   6508篇
  2019年   6281篇
  2018年   10731篇
  2017年   10946篇
  2016年   11474篇
  2015年   7339篇
  2014年   12391篇
  2013年   33012篇
  2012年   19413篇
  2011年   26234篇
  2010年   20999篇
  2009年   23495篇
  2008年   23850篇
  2007年   23565篇
  2006年   20408篇
  2005年   18658篇
  2004年   17739篇
  2003年   17188篇
  2002年   16772篇
  2001年   16083篇
  2000年   15369篇
  1999年   15160篇
  1998年   35075篇
  1997年   25501篇
  1996年   20062篇
  1995年   15455篇
  1994年   13799篇
  1993年   13565篇
  1992年   10542篇
  1991年   10001篇
  1990年   9976篇
  1989年   9701篇
  1988年   9365篇
  1987年   8482篇
  1986年   8267篇
  1985年   9431篇
  1984年   8576篇
  1983年   8101篇
  1982年   7388篇
  1981年   7520篇
  1980年   7132篇
  1979年   7269篇
  1978年   7136篇
  1977年   7882篇
  1976年   9875篇
  1975年   6392篇
  1974年   6112篇
  1973年   6282篇
  1972年   5300篇
  1971年   4939篇
排序方式: 共有10000条查询结果,搜索用时 15 毫秒
991.
Studies the complexity of the problem of allocating m modules to n processors in a distributed system to minimize total communication and execution costs. When the communication graph is a tree, Bokhari has shown that the optimum allocation can be determined in O(mn2) time. Recently, this result has been generalized by Fernandez-Baca, who has proposed an allocation algorithm in O(mnk+1) when the communication graph is a partial k-tree. The author shows that in the case where communication costs are uniform, the module allocation problem can be solved in O(mn) time if the communication graph is a tree. This algorithm is asymptotically optimum  相似文献   
992.
A new approach is given for scheduling a sequential instruction stream for execution “in parallel” on asynchronous multiprocessors. The key idea in our approach is to exploit the fine grained parallelism present in the instruction stream. In this context, schedules are constructed by a careful balancing of execution and communication costs at the level of individual instructions, and their data dependencies. Three methods are used to evaluate our approach. First, several existing methods are extended to the fine grained situation. Our approach is then compared to these methods using both static schedule length analyses, and simulated executions of the scheduled code. In each instance, our method is found to provide significantly shorter schedules. Second, by varying parameters such as the speed of the instruction set, and the speed/parallelism in the interconnection structure, simulation techniques are used to examine the effects of various architectural considerations on the executions of the schedules. These results show that our approach provides significant speedups in a wide-range of situations. Third, schedules produced by our approach are executed on a two-processor Data General shared memory multiprocessor system. These experiments show that there is a strong correlation between our simulation results, and these actual executions, and thereby serve to validate the simulation studies. Together, our results establish that fine grained parallelism can be exploited in a substantial manner when scheduling a sequential instruction stream for execution “in parallel” on asynchronous multiprocessors  相似文献   
993.
Pipelining and bypassing in a VLIW processor   总被引:1,自引:0,他引:1  
This short note describes issues involved in the bypassing mechanism for a very long instruction word (VLIW) processor and its relation to the pipeline structure of the processor. The authors first describe the pipeline structure of their processor and analyze its performance and compare it to typical RISC-style pipeline structures given the context of a processor with multiple functional units. Next they study the performance effects of various bypassing schemes in terms of their effectiveness in resolving pipeline data hazards and their effect on the processor cycle time  相似文献   
994.
This paper addresses the existence of loop gain-phase shaping (LGPS) solutions for the design of robust digital control systems for SISO, minimum-phase, continuous-time processes with parametric uncertainty. We develop the frequency response properties of LGPS for discrete-time systems using the Δ-transform, a transform method that applies to both continuous-time and discrete-time systems. A theorem is presented which demonstrates that for reasonable specifications there always exists a sampling period such that the robust digital control problem has a solution. Finally, we offer a procedure for estimating the maximum feasible sampling period for LGPS solutions to robust digital control problems.  相似文献   
995.
Nonlinear quantitative feedback theory (QFT) and pilot compensation techniques are used to design a 2 × 2 flight control system for the YF-16 aircraft over a large range of plant uncertainty. The design is based on numerical input-output time histories generated with a FORTRAN implemented nonlinear simulation of the YF-16. The first step of the design process is the generation of a set of equivalent linear time-invariant (LTI) plant models to represent the actual nonlinear plant. It has been proven that the solution to the equivalent plant problem is guaranteed to solve the original nonlinear problem. Standard QFT techniques are then used in the design synthesis based on the equivalent plant models. A detailed mathematical development of the method used to develop these equivalent LTI plant models is provided. After this inner-loop design, pilot compensation is developed to reduce the pilot's workload. This outer-loop design is also based on a set of equivalent LTI plant models. This is accomplished by modelling the pilot with parameters that result in good handling qualities ratings, and developing the necessary compensation to force the desired system responses.  相似文献   
996.
We present an all-aluminum MEMS process (Al-MEMS) for the fabrication of large-gap electrostatic actuators with process steps that are compatible with the future use of underlying, pre-fabricated CMOS control circuitry. The process is purely additive above the substrate as opposed to processes that depend on etching pits into the silicon, and thereby permits a high degree of design freedom. Multilayer aluminum metallization is used with organic sacrificial layers to build up the actuator structures. Oxygen-based dry etching is used to remove the sacrificial layers. While this approach has been previously used by other investigators to fabricate optical modulators and displays, the specific process presented herein has been optimized for driving mechanical actuators with relatively large travels. The process is also intended to provide flexibility for design and future enhancements. For example, the gap height between the actuator and the underlying electrode(s) can be set using an adjustable polyimide sacrificial layer and aluminum “post” deposition step. Several Al-MEMS electrostatic structures designed for use as mechanical actuators are presented as well as some measured actuation characteristics  相似文献   
997.
For users of an executive information system (EIS), the EIS interface is the system and is crucial to the EIS's success. These guidelines for designing EIS interfaces are based on studies of actual EIS interfaces that meet the unique information needs of executives.  相似文献   
998.
What is the implication for business when information technology (IT) changes in the workplace without a commensurate change in the composition of business programs educating tomorrow's employees? A survey of MBA graduates forms the basis of this article on the IT skills needed in the marketplace.  相似文献   
999.
Translated from Kibernetika i Sistemnyi Analiz, No. 4, pp. 140–155, July–August 1994.  相似文献   
1000.
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号