WCDMA Uplink Capacity of Highways Cigar-Shaped Microcells with Incorporated HSUPA Service

The multi-service (voice, data and HSUPA) uplink capacity and the interference statistics of the sectors of the cigar-shaped WCDMA microcell are studied using a model of 5 highway microcells. The two-slope propagation loss model with lognormal shadowing is used in the analysis. It is concluded that the voice and data service are significantly affected by HSUPA users and sector capacity decreases dramatically when one of these users gets connected to a given sector or to one next to it. Also it has been concluded that the capacity decrement is highly sensitive to the location of the HSUPA users. Thus, no more than one HSUPA with a process gain of 16 can be connected to a given base station. In this case, the HSUPA user should interrupt its transmission when it is near to the sector border. No more than one HSUPA user with a process gain of 8 is permitted in a given sector and the sector next to it. When the HSUPA user is at the sector border, its transmission should be disabled.     

Interference coordination for LTE-Advanced and FM broadcasting interoperability

The surest way to guarantee that multiple wireless systems can concurrently exist harmlessly, when operating in the same or adjacent channel, is by analyzing spectrum overlapping. This paper proposes a more accurate model to evaluate the interference power from co-channel and adjacent channel of orthogonal frequency division multiplexing-based long term evolution-advanced (LTE-Advanced) towards broadcasting frequency modulation systems at 800?MHz. Power spectral density overlapping factor is employed, and closed form of the interference power loss is derived. Numerical results demonstrate that the proposed method evaluates more exact interference power than the advanced minimum coupling loss (A-MCL) method, where the co-channel and adjacent channel interference powers are reduced by 1.3 and 3?dB, correspondingly, compared to that obtained using the A-MCL method. This decreases the minimum separation distance between the two systems, which can eventually lead to efficient radio spectrum resources utilization.     

A High Bandwidth Power Scalable Sub-Sampling 10-Bit Pipelined ADC With Embedded Sample and Hold

A pipelined ADC architecture for use in sub-sampled systems which is power scalable in relation to its down sampled bandwidth is presented. The ADC uses a technique to eliminate the front-end sample hold, thereby reducing power consumption. The technique allows for a power savings of 20% compared to a previous design. A method to improve the settling behavior of rapid power-on opamps is also presented. Measured results in a 1.8 V 0.18 CMOS process verify the removal of the front-end sample and hold does not cause gross MSB errors for input frequencies higher than 267 MHz. With 50 MS/s, for the SNDR is 51.5 dB, and with 4.55 MS/s for the SNDR is 52.2 dB.     

Cooperative transmission protocol with full diversity and iterative detection

The authors propose a three-node full diversity cooperative protocol, which allows the retransmission of all symbols. By allowing multiple nodes to transmit simultaneously, relaying transmission only consumes limited bandwidth resource. To facilitate the performance analysis of the proposed cooperative protocol, the lower and upper bounds of the outage probability are first developed, and then the high signal-to-noise ratio behaviour is studied. Our analytical results show that the proposed strategy can achieve full diversity. To achieve the performance gain promised by the cooperative diversity, at the relays decode-and-forward strategy is adopted and an iterative soft-interference-cancellation minimum mean-squared error equaliser is developed. The simulation results compare the bit-error-rate performance of the proposed protocol with the non-cooperative scheme and the scheme presented by Azarian et al. (2005).     

UNICORE 6 — Recent and Future Advancements

UNICORE is a European Grid Technology with more than 10 years of history. Originating from the Supercomputing domain, the latest version UNICORE 6 has turned into a general-purpose Grid technology that follows established standards and offers a rich set of features to its users. The paper starts with an architectural insight into UNICORE 6, highlighting the workflow features, standards and the different clients. Next, the current state of advancement is presented by describing recent developments. The paper closes with an outlook on future planned developments.     

INSPAD: a system for automatic bond pad inspection

A method of detecting probe mark defects in semiconductor bond pads is presented that uses digitized images of color Polaroid photographs from an optical microscope. INSPAD inspects the bond pads in a magnified IC circuit image taken after the electrical testing stage. These are: probe marks must not extend beyond pad boundaries such that they damage glassivation; scratches on the bond pads must not exceed 50% of the bond pad width; and the probe marks must not exceed 25% of the bond pad area. Three types of commonly used bond pad geometries have been addressed. Morphological filtering is performed on the bond pad, to isolate and identify the major probe mark regions. Inspection of each pad takes approximately 2 to 3 s on an Apollo DN-4000 workstation which makes it suitable for real-time applications     

Effects of Plasticizers,Antioxidants and Burning Rate Modifiers on Aging Performance of the HTPB/HMDI Composite Solid Propellant

The effects of plasticizers,antioxidants and burning rate modifiers on the aging performance of the composite solid propellant based on hydroxyl-terminated polybutadiene(HTPB)/hexamethylene diisocyanate(HMDI)were explored by apply-ing an accelerated aging program for 90 day at 70 ℃. The HTPB propellant matrix with the diisooctyl sebacate(DOS)as plasti-cizers and diisooctyl azelate(DOZ), antioxidants as N,N ′-Diphenyl-p-phenylenediamine(AO) and 2,2′-methylenebis(4-methyl-6-tert-butylphenol)(cyanox 2246)and burning rate modifiers as barium ferrite(BF),copper chromites(CC)and fer-ric oxide(FO)were varied. Results show that sample(S1)which based on DOS decreases the stress value and increases the strain value which considered to be an excellent start for aging program. Sample(S3)containing AO presents the higher resis-tance to oxidation showing the better performance that reflects on increasing the shelf life of the composite solid propellant mo-tor. Sample(S5)which based on BF enhances the ballistic performance among over the other tested two samples. The accelerat-ed aging program allowed us to estimate the motor in-service lifetime.     

New CMOS Fully‐Differential Transconductor and Application to a Fully‐Differential Gm‐C Filter

A new CMOS voltage‐controlled fully‐differential transconductor is presented. The basic structure of the proposed transconductor is based on a four‐MOS transistor cell operating in the triode or saturation region. It achieves a high linearity range of ± 1 V at a 1.5 V supply voltage. The proposed transconductor is used to realize a new fully‐differential Gm‐C low‐pass filter with a minimum number of transconductors and grounded capacitors. PSpice simulation results for the transconductor circuit and its filter application indicating the linearity range and verifying the analytical results using 0.35 μm technology are also given.     

Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays

This paper presents results of using a Coarse Grain Reconfigurable Architecture called DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in order and degree of parallelism using radix-2 decimation in time (DIT). The DRRA fabric is extended with memory architecture to be able to deal with data-sets much larger than what can be accommodated in the register files of DRRA. The proposed implementation scheme is generic in terms of the number of FFT point, the size of memory and the size of register file in DRRA. Two implementations (DRRA-1 and DRRA-2) have been synthesized in 65 nm technology and energy/delay numbers measured with post-layout annotated gate level simulations. The results are compared to other Coarse Grain Reconfigurable Architectures (CGRAs), and dedicated FFT processors for 1024 and 2048 point FFT. For 1024 point FFT, in terms of FFT operations per unit energy, DRRA-1 and DRRA-2 outperforms all CGRA by at least 2× and is worse than ASIC by 3.45×. However, in terms of energy-delay product DRRA-2 outperforms CGRAs by at least 1.66× and dedicated FFT processors by at least 10.9×. For 2048-point FFT, DRRA-1 and DRRA-2 are 10× better for energy efficiency and 94.84 better for energy-delay product. However, radix-2 implementation is worse by 9.64× and 255× in terms of energy efficiency and energy-delay product when compared against a radix-2⁴ implementation.

     

Best Minimum Summation Scheduler for Long Term Evolution

Resource scheduling in Long Term Evolution (LTE) is an open and rising issue. It has an enormous impact on the entire system performance. Due to the nature of LTE system, the scheduler has to be designed carefully. It has to overcome many challenges such as limited processing time and the high dynamic behavior. This paper proposes a novel scheduling policy for the MAC layer in LTE called the Best Minimum Summation (BMS). The main aim of this scheduling policy is to achieve high performance with low complexity. Three sub-schedulers have been developed. Each one of these schedulers deals with scheduling table in different dimension. The first one operates on the scheduling table through the user dimension (BMS.UE); while the second one operates on the scheduling table through the resource block dimension (BMS.RB). The third scheduler operates on the scheduling table correlating both of these dimensions (BMS.2D). All of the proposed solutions were intensively evaluated in a system level simulator. Three performance metrics were used which are throughput, error rate and fairness. The results have shown that the ability of the BMS.UE scheduler to outperform other existing schedulers of LTE.