Performance evaluation of an importance sampling technique in a Jackson network

Importance sampling is a technique that is commonly used to speed up Monte Carlo simulation of rare events. However, little is known regarding the design of efficient importance sampling algorithms in the context of queueing networks. The standard approach, which simulates the system using an a priori fixed change of measure suggested by large deviation analysis, has been shown to fail in even the simplest network settings. Estimating probabilities associated with rare events has been a topic of great importance in queueing theory, and in applied probability at large. In this article, we analyse the performance of an importance sampling estimator for a rare event probability in a Jackson network. This article carries out strict deadlines to a two-node Jackson network with feedback whose arrival and service rates are modulated by an exogenous finite state Markov process. We have estimated the probability of network blocking for various sets of parameters, and also the probability of missing the deadline of customers for different loads and deadlines. We have finally shown that the probability of total population overflow may be affected by various deadline values, service rates and arrival rates.     

A novel design of 8-bit adder/subtractor by quantum-dot cellular automata

Application of quantum-dot is a promising technology for implementing digital systems at nano-scale. QCA supports the new devices with nanotechnology architecture. This technique works based on electron interactions inside quantum-dots leading to emergence of quantum features and decreasing the problem of future integrated circuits in terms of size. In this paper, we will successfully design, implement and simulate a new full adder based on QCA with the minimum delay, area and complexities. Also, new XOR gates will be presented which are used in 8-bit controllable inverter in QCA. Furthermore, a new 8-bit full adder is designed based on the majority gate in the QCA, with the minimum number of cells and area which combines both designs to implement an 8-bit adder/subtractor in the QCA. This 8-bit adder/subtractor circuit has the minimum delay and complexity. Being potentially pipeline, the QCA technology calculates the maximum operating speed.     

Fabrication of SiC-Whisker-Reinforced MoSi2 Composites by Tape Casting

In this paper, we describe a procedure for the processing of SiC-whisker-reinforced MoSi₂ composites via tape casting. Based on the characteristics of SiC whiskers and MoSi₂ powder in aqueous and nonaqueous solvents, a slip formulation (solvent, dispersant, binder, etc.) has been developed. The formulation developed allows for a uniform distribution of SiC whiskers in the matrix, easy separation of the tapes from the polymeric carrier, convenient control of both tape thickness and orientation of SiC whiskers, and a low binder burnout temperature. The latter is important for the prevention of the oxidation of MoSi₂ powder during the binder burnout in an oxidizing atmosphere.     

Designing N‐PolyVector Fields with Complex Polynomials

We introduce N‐PolyVector fields, a generalization of N‐RoSy fields for which the vectors are neither necessarily orthogonal nor rotationally symmetric. We formally define a novel representation for N‐PolyVectors as the root sets of complex polynomials and analyze their topological and geometric properties. A smooth N‐PolyVector field can be efficiently generated by solving a sparse linear system without integer variables. We exploit the flexibility of N‐PolyVector fields to design conjugate vector fields, offering an intuitive tool to generate planar quadrilateral meshes.     

A Projective Framework for Polyhedral Mesh Modelling

We present a novel framework for polyhedral mesh editing with face‐based projective maps that preserves planarity by definition. Such meshes are essential in the field of architectural design and rationalization. By using homogeneous coordinates to describe vertices, we can parametrize the entire shape space of planar‐preserving deformations with bilinear equations. The generality of this space allows for polyhedral geometric processing methods to be conducted with ease. We demonstrate its usefulness in planar‐quadrilateral mesh subdivision, a resulting multi‐resolution editing algorithm, and novel shape‐space exploration with prescribed transformations. Furthermore, we show that our shape space is a discretization of a continuous space of conjugate‐preserving projective transformation fields on surfaces. Our shape space directly addresses planar‐quad meshes, on which we put a focus, and we further show that our framework naturally extends to meshes with faces of more than four vertices as well.     

Modeling of protein adsorption to DEAE sepharose FF: Comparison of data with model simulation

The equilibrium and kinetic characteristics of the adsorption of human serum albumin (HSA) and ovalbumin (OVA) to the DEAE Sepharose FF weak anion exchanger were experimentally determined. The rate for protein adsorption was simulated with two different models, the first being based on a single lumped kinetic parameter, while the second includes the individual mass transfer processes occurring prior to the adsorption intervention, i.e., diffusion across the liquid film surrounding individual particles and diffusion within the ion exchanger particle itself. The actual adsorption of OVA to DEAE Sepharose FF in fully mixed stirred vessels and in packed bed columns was consistent with both models. In the case of HSA, however, the adsorption profile in an agitated vessel was consistent only with the pore diffusion model and neither model could correctly predict the latter part of the breakthrough profile observed in packed bed experiments.     

A 60‐GHz on‐chip slot‐array antenna in integrated‐passive‐device technology for antenna‐in‐package applications

A new millimeter‐wave antenna structure on a low‐cost, production platform integrated passive device technology is presented. The antenna consists of a 2‐by‐1 array of slot antennas at 60 GHz. An in‐house developed on‐chip antenna measurement setup was used to characterize the fabricated antenna. The measurement results show an antenna gain of more than 5 dBi with a return loss of 18 dB at 60 GHz. The better‐than‐10‐dB impedance bandwidth of the antenna covers the 60‐GHz unlicensed band from 57 to 64 GHz. The 3‐dB beamwidths of the antenna are 105° and 76° at E‐plane and H‐plane at 60 GHz, respectively. The size of the die of the antenna is 2 mm × 4.5 mm. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:155–160, 2014.     

An empirical study of control logic specifications for programmable logic controllers

This paper presents an empirical study of control logic specifications used to document industrial control logic code in manufacturing applications. More than one hundred input/output related property specifications from ten different reusable function blocks were investigated. The main purpose of the study was to provide understanding of how the specifications are expressed by industrial practitioners, in order to develop new tools and methods for specifying control logic software, as well as for evaluating existing ones. In this paper, the studied specifications are used to evaluate linear temporal logic in general and the specification language ST-LTL, tailored for functions blocks, in particular. The study shows that most specifications are expressed as implications, that should always be fulfilled, between input and output conditions. Many of these implications are complex since the input and output conditions may be mixed and involve sequences, timer issues and non-boolean variables. Using ST-LTL it was possible to represent all implications of this study. The few non-implication specifications could be specified in ST-LTL as well after being altered to suit the specification language. The paper demonstrates some advantages of ST-LTL compared to standard linear temporal logic and discusses possible improvements such as support for automatic rewrite of complex specifications.