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21.
The epitopes of a homohexameric food allergen protein, cashew Ana o 2, identified by two monoclonal antibodies, 2B5 and 1F5, were mapped by solution-phase amide backbone H/D exchange (HDX) coupled with Fourier transform ion cyclotron resonance mass spectrometry (FTICR MS) and the results were compared to previous mapping by immunological and mutational analyses. Antibody 2B5 defines a conformational epitope, and 1F5 defines a linear epitope. Intact murine IgG antibodies were incubated with recombinant Ana o 2 (rAna o 2) to form antigen-monoclonal antibody (Ag-mAb) complexes. mAb-complexed and uncomplexed (free) rAna o 2 were then subjected to HDX. HDX instrumentation and automation were optimized to achieve high sequence coverage by protease XIII digestion. The regions protected from H/D exchange upon antibody binding overlap and thus confirm the previously identified epitope-bearing segments: the first extension of HDX monitored by mass spectrometry to a full-length antigen-antibody complex in solution.  相似文献   
22.

We have investigated strain-induced spin lattice coupling in the CoFe2O4/0.65Pb (Mg1/3Nb2/3)O3–0.35PbTiO3(PMN-PT) composite system, evident by temperature-dependent Raman spectroscopy and magnetization measurements. The strain interactions lead to magneto-electric coupling, and the measured magneto-electric voltage coefficient is 40 mV/cm?1Oe?1 for the CoFe2O4/PMN-PT composite samples. X-ray magnetic circular dichroism (XMCD) analysis establishes modified spin structure in the electrically poled CoFe2O4/PMN-PT composite, further validating the coupling between magnetic and electric ordering in the composite. The magneto-electric coupling coefficient α vs dc magnetic field curves revealed hysteretic behavior and enhanced α values after electric poling, which originates from the strain-induced modifications in the magnetic structure of composite in the electrically poled samples. These findings suggest that the existence of spin lattice coupling may lead to the mechanism of strong magneto-electric effects via strain interactions in CoFe2O4/PMN-PT composite.

  相似文献   
23.
Energy-Efficient GHz-Class Charge-Recovery Logic   总被引:3,自引:0,他引:3  
In this paper, we present Boost Logic, a charge- recovery circuit family that can operate efficiently at clock frequencies in excess of 1 GHz. To achieve high energy efficiency, Boost Logic relies on a combination of aggressive voltage scaling, gate overdrive, and charge-recovery techniques. In post-layout simulations of 16-bit multipliers with a 0.13-mum CMOS process at 1GHz, a Boost Logic implementation achieves 5 times higher energy efficiency than its minimum-energy pipelined, voltage-scaled, static CMOS counterpart at the expense of 3 times longer latency. In a fully integrated test chip implemented using a 0.13-mum bulk silicon process and on-chip inductors, chains of Boost Logic gates operate at clock frequencies up to 1.3 GHz with a 1.5-V supply. When resonating at 850 MHz with a 1.2-V supply, the Boost Logic test chip achieves 60% charge-recovery  相似文献   
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Looking forward to the need of developing coal-based sponge iron technology in India, a country having no significant resources of either coking coal or natural gas, the Research and Development Division of the Tata Iron and Steel Company Limited (TISCO) set up a rotary kiln based direct reduction pilot plant in 1975. In this pilot plant, a totally indigenous technology for production of sponge iron has been developed in which non-coking coal is essentially used as the reductant. For easy scaling up of the TISCO Direct Reduction (TDR) process to units of 300 to 400 tpd capacity, it was thought necessary to explore some of the fundamental aspects of material flow in a rotary kiln. This was carried out by studying the flow of materials in room temperature models. The work was divided into two parts: first, a study of the influence of several operating parameters,viz., rotational speed, inclination of the kiln, effect of circular dams at the feed and the exit ends of the kiln,etc., and second, an investigation of the extent of segregation of a mixture of solids in a rotating kiln. The highlights of the experimental results dealing mainly with the effect of various kiln operating variables on the filling degree profile of the charge in the kiln are presented. Formerly Joint Director, Research and Development, TISCO Formerly with TISCO, Jamshedpur  相似文献   
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This research proposes an improved hybrid fusion scheme for non-subsampled contourlet transform (NSCT) and stationary wavelet transform (SWT). Initially, the source images are decomposed into different sub-bands using NSCT. The locally weighted sum of square of the coefficients based fusion rule with consistency verification is used to fuse the detailed coefficients of NSCT. The SWT is employed to decompose approximation coefficients of NSCT into different sub-bands. The entropy of square of the coefficients and weighted sum-modified Laplacian is employed as the fusion rules with SWT. The final output is obtained using inverse NSCT. The proposed research is compared with existing fusion schemes visually and quantitatively. From the visual analysis, it is observed that the proposed scheme retained important complementary information of source images in a better way. From the quantitative comparison, it is seen that this scheme gave improved edge information, clarity, contrast, texture, and brightness in the fused image.  相似文献   
28.
Cloud computing is becoming a profitable technology because of it offers cost-effective IT solutions globally. A well-designed task scheduling algorithm ensures the optimal utilization of clouds resources and reducing execution time dynamically. This research article deals with the task scheduling of inter-dependent subtasks on unrelated parallel computing machines in a cloud computing environment. This article considers two variants of the problem-based on two different objective function values. The first variant considers the minimization of the total completion time objective function while the second variant considers the minimization of the makespan objective function. Heuristic and meta-heuristic (HEART) based algorithms are proposed to solve the task scheduling problems. These algorithms utilize the property of list scheduling algorithm of unrelated parallel machine scheduling problem. A mixed integer linear programming (MILP) formulation has been provided for the two variants of the problem. The optimal solution is obtained by solving MILP formulation using A Mathematical Programming Language (AMPL) software. Extensive numerical experiments have been performed to evaluate the performance of proposed algorithms. The solutions obtained by the proposed algorithms are found to out-perform the existing algorithms. The proposed algorithms can be used by cloud computing service providers (CCSPs) for enhancing their resources utilization to reduce their operating cost.  相似文献   
29.
Virtualization plays a vital role in the construction of cloud computing. However, various vulnerabilities are existing in current virtualization implementations, and thus there are various security challenges at virtualization layer. In this paper, we investigate different vulnerabilities and attacks at virtualization layer of cloud computing. We examine the proposals of cloud intrusion detection system (IDS) and intrusion detection and prevention system frameworks. We recommend the cloud IDS requirements and research scope to achieve desired level of security at virtualization layer of cloud computing.  相似文献   
30.
A detailed numerical and experimental study of the thermal-mechanical stress and strain in the solder bumps (C4s) of a flip-chip ceramic chip carrier has been completed. The numerical model used was based upon the finite element method. The model simulated accelerated thermal cycling (ATC) from 0°C to 100°C. Several parametric studies were conducted, including the effects of chip size, micro-encapsulation, and the effect of the presence of voids in the micro-encapsulant. It was notably found that the presence of voids in the encapsulant does not significantly increase the stress/strain in the C4s, with the exception of very large voids and voids at or near the edge of the chip  相似文献   
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