A fully on-chip LDO voltage regulator with 37 dB PSRR at 1 MHz for remotely powered biomedical implants

This article presents a fully on-chip low-power LDO voltage regulator dedicated to remotely powered wireless cortical implants. This regulator is stable over the full range of alternating load current and provides fast load regulation achieved by applying a time-domain design methodology. Moreover, a new compensation technique is proposed and implemented to improve PSRR beyond the performance levels which can be obtained using the standard cascode compensation technique. Measurement results show that the regulator has a load regulation of 0.175 V/A, a line regulation of 0.024%, and a PSRR of 37 dB at 1 MHz power carrier frequency. The output of the regulator settles within 10-bit accuracy of the nominal voltage (1.8 V) within 1.6 μs, at full load transition. The total ground current including the bandgap reference circuit is 28 μA and the active chip area measures 290 μm × 360 μm in a 0.18 μm CMOS technology.     

Adaptive Packetization for Conversational Video Service over IEEE 802.11 WLANs with Hidden Terminals

For IEEE 802.11-based wireless local area networks (WLANs), due to inherent random access mechanisms, it is very challenging to provision video services, which are subject to very stringent quality-of-service (QoS) constraints. Collision and fading are two main sources of packet loss in WLANs and as such, both are affected by the packetization at the medium access control (MAC) layer. While a larger packet is preferred to balance protocol header overhead, a shorter packet is less vulnerable to packet loss due to channel fading errors or staggered collisions in the presence of hidden terminals. In this paper, we exploit estimate of collision probabilities to adapt packetization for video frames. We first show analytically that the effective throughput is a unimodal function of packet size when considering both channel fading and staggered collisions. We then design an additive increase and multiplicative decrease (AIMD) packetization strategy which adjusts the MAC-layer packet size based on local estimate of staggered collision probability. It is demonstrated that the proposed approach can greatly improve the effective throughput of WLAN and reduce video frame transfer delay.     

A High Throughput Configurable SDR Detector for Multi-user MIMO Wireless Systems

Spatial division multiplexing (SDM) in MIMO technology significantly increases the spectral efficiency, and hence capacity, of a wireless communication system: it is a core component of the next generation wireless systems, e.g. WiMAX, 3GPP LTE and other OFDM-based communication schemes. Moreover, spatial division multiple access (SDMA) is one of the widely used techniques for sharing the wireless medium between different mobile devices. Sphere detection is a prominent method of simplifying the detection complexity in both SDM and SDMA systems while maintaining BER performance comparable with the optimum maximum-likelihood (ML) detection. On the other hand, with different standards supporting different system parameters, it is crucial for both base station and handset devices to be configurable and seamlessly switch between different modes without the need for separate dedicated hardware units. This challenge emphasizes the need for SDR designs that target the handset devices. In this paper, we propose the architecture and FPGA realization of a configurable sort-free sphere detector, Flex-Sphere, that supports 4, 16, 64-QAM modulations as well as a combination of 2, 3 and 4 antenna/user configuration for handsets. The detector provides a data rate of up to 857.1 Mbps that fits well within the requirements of any of the next generation wireless standards. The algorithmic optimizations employed to produce an FPGA friendly realization are discussed.     

Scene categorization based on local–global feature fusion and multi-scale multi-spatial resolution encoding

With the bag-of-contextual-visual-word (BOCVW) models, we propose a scene categorization method based on local–global feature fusion and multi-scale multi-spatial resolution encoding. First, the performances of the BOCVW models belonging to different features are mutually reinforced by fusing other types of features within local regions. Then, the spatial configuration information is explored using a multi-scale multi-spatial resolution encoding approach. Furthermore, these encoded BOCVW models are globally fused using an improved maximum-margin optimization strategy, which considers the margin between input vectors of different categories and the diameter of the smallest ball containing feature vectors simultaneously. The proposed method has been evaluated on three scene categorization datasets consisting of scene categories 8, 15, and 67, respectively. And its effectiveness has been verified by these experimental results.     

Photoactive Electrodes Incorporating Electrosprayed Bacterial Reaction Centers

Highly efficient light absorption and charge separation within the photosystem and reaction center (RC) complexes of photosynthetic plants and bacteria are of great interest for solar cell and photo detector applications, since they offer almost unity quantum yield and expected ultimate power conversion efficiencies of more than 18% and 12%, respectively. In addition, the charge separated states created by these protein complexes are very long lived compared to conventional semiconductor solar cells. In this work, a novel technique is presented for the deposition of photosynthetic protein complexes, by electrospraying RCs of Rhodobacter sphaeroides onto highly ordered pyrolytic graphite (HOPG) electrodes. Remarkably, it is shown that the RCs not only survive exposure to the high electric fields but also yield peak photocurrent densities of up to 7 μA cm^?2, which is equal to the highest value reported to date.     

A New Family of Ultralow Loss Reversible Phase‐Change Materials for Photonic Integrated Circuits: Sb2S3 and Sb2Se3

Phase‐change materials (PCMs) are seeing tremendous interest for their use in reconfigurable photonic devices; however, the most common PCMs exhibit a large absorption loss in one or both states. Here, Sb₂S₃ and Sb₂Se₃ are demonstrated as a class of low loss, reversible alternatives to the standard commercially available chalcogenide PCMs. A contrast of refractive index of Δn = 0.60 for Sb₂S₃ and Δn = 0.77 for Sb₂Se₃ is reported, while maintaining very low losses (k < 10^?5) in the telecommunications C‐band at 1550 nm. With a stronger absorption in the visible spectrum, Sb₂Se₃ allows for reversible optical switching using conventional visible wavelength lasers. Here, a stable switching endurance of better than 4000 cycles is demonstrated. To deal with the essentially zero intrinsic absorption losses, a new figure of merit (FOM) is introduced taking into account the measured waveguide losses when integrating these materials onto a standard silicon photonics platform. The FOM of 29 rad phase shift per dB of loss for Sb₂Se₃ outperforms Ge₂Sb₂Te₅ by two orders of magnitude and paves the way for on‐chip programmable phase control. These truly low‐loss switchable materials open up new directions in programmable integrated photonic circuits, switchable metasurfaces, and nanophotonic devices.     

AN ENHANCEMENT SCHEME OF TCP PROTOCOL IN MOBILE AD HOC NETWORKS： MME-TCP

Transmission Control Protocol （TCP） optimization in Mobile Ad hoc NETworks （MANETs） is a challenging issue because of some unique characteristics of MANETs. In this paper, a new end-to-end mechanism based on multiple metrics measurement is proposed to improve TCP performance in MANETs. Multi-metric Measurement based Enhancement of TCP （MME-TCP） designs the metrics and the identification algorithm according to the characteristics of MANETs and the experiment results. Furthermore, these metrics are measured at the sender node to reduce the overhead of control information over networks. Simulation results show that MME-TCP mechanism achieves a significant performance improvement over standard TCP in MANETs.     

DESIGN OF TWO-PHASE SINUSOIDAL POWER CLOCK AND CLOCKED TRANSMISSION GATE ADIABATIC LOGIC CIRCUIT

First the research is conducted on the design of the two-phase sinusoidal power clock generator in this paper. Then the design of the new adiabatic logic circuit adopting the two-phase sinusoidal power clocks--Clocked Transmission Gate Adiabatic Logic （CTGAL） circuit is presented. This circuit makes use of the clocked transmission gates to sample the input signals, then the output loads are charged and discharged in a fully adiabatic manner by using bootstrapped N-Channel Metal Oxide Semiconductor （NMOS） and Complementary Metal Oxide Semiconductor （CMOS） latch structure. Finally, with the parameters of Taiwan Semiconductor Manufacturing Company （TSMC） 0.25um CMOS device, the transient energy consumption of CTGAL, Bootstrap Charge-Recovery Logic （BCRL） and Pass-transistor Adiabatic Logic （PAL） including their clock generators is simulated. The simulation result indicates that CTGAL circuit has the characteristic of remarkably low energy consumption.