InGaP//GaAs//c‐Si 3‐junction solar cells employing spectrum‐splitting system

In this work, we practically demonstrated spectrum‐splitting approach for advances in efficiency of photovoltaic cells. Firstly, a‐Si:H//c‐Si 2‐junction configuration was designed, which exhibited 24.4% efficiency with the spectrum splitting at 620 nm. Then, we improved the top cell property by employing InGaP cells instead of the a‐Si:H, resulting in an achievement of efficiency about 28.8%. In addition, we constructed 3‐junction spectrum‐splitting system with two optical splitters, and GaAs solar cells as middle cell. This InGaP//GaAs//c‐Si architecture was found to deliver 30.9% conversion efficiency. Our splitting system includes convex lenses for light concentration about 10 suns, which provided concentrated efficiency exceeding 33.0%. These results suggest that our demonstration of 3‐junction spectrum‐splitting approach can be a promising candidate for highly efficient photovoltaic technologies. Copyright © 2016 John Wiley & Sons, Ltd.     

基于参数估计和感知提升的语音增强降噪算法

为了提高单通道语音增强降噪算法的整体质量,该文从噪声消除和语音感知两个角度出发对传统语音增强算法进行改进,通过引入多种处理手段来达到最佳优化效果。首先在参数估计方面,把基于弱语音出现的平滑算法加入到基于固定先验信噪比的软判决方法中来解决噪声谱过估计问题,并根据语音帧存在概率动态调整平滑因子,从而提高先验信噪比的跟踪效果。其次在语音质量感知提升方面,采用谐波恢复的方法重建语音段的高频谐波分量,并采用相位补偿和增益平滑的方法消除静默段和语音段的音乐噪声。实验结果表明,相比传统算法,该文算法通过引入参数估计改进模块和感知质量提升模块,在消噪效果和语音质量两方面均得到了较大的提高,并适用于多类噪声环境和信噪比条件。     

基于多媒体宽带网的三种电子商务应用接入方式的比较

本文探讨了电子商务在多媒体宽带网上进行应用的可行性 ,并对几种不同的应用系统进行了比较。     

RuO2/GaN Schottky contact formation with superiorforward and reverse characteristics

This is a first time report of a ruthenium oxide (RuO₂) Schottky contact on GaN. RuO₂ and Pt Schottky diodes were fabricated and their characteristics compared. When the RuO₂ Schottky contact was annealed at 500°C for 30 min, the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the RuO₂ were dramatically improved. The annealed RuO₂ /GaN Schottky contact exhibited a reverse leakage current that was at least two or three orders lower in magnitude than that of the Pt/GaN contact along with a very large barrier height of 1.46 eV, which is the highest value ever reported for a GaN Schottky system     

Effects of underfill material properties on the reliability ofsolder bumped flip chip on board with imperfect underfill encapsulants

Three different types of underfill imperfections were considered; i.e., (1) interfacial delamination between the underfill encapsulant and the solder mask on the PCB (crack initiated at the tip of underfill fillet), (2) interfacial delamination between the chip and the underfill encapsulant (crack initiated at the chip corner), and (3) the same as (2) but without the underfill fillet. Five different combinations of coefficient of thermal expansion (CTE) and Young's modulus with the aforementioned delaminations were investigated. A fracture mechanics approach was employed for computational analysis. The strain energy release rate at the crack tip and the maximum accumulated equivalent plastic strain in the solder bumps of all cases were evaluated as indices of reliability. Besides, mechanical shear tests were performed to characterize the shear strength at the underfill-solder mask interface and the underfill-chip passivation interface. The main objective of the present study is to achieve a better understanding in the thermo-mechanical behavior of flip chip on board (FCOB) assemblies with imperfect underfill encapsulants     

High capacity image steganographic model

Steganography is an ancient art of conveying messages in a secret way that only the receiver knows the existence of a message. So a fundamental requirement for a steganographic method is imperceptibility; this means that the embedded messages should not be discernible to the human eye. There are two other requirements, one is to maximise the embedding capacity, and the other is security. The least-significant bit (LSB) insertion method is the most common and easiest method for embedding messages in an image. However, how to decide on the maximal embedding capacity for each pixel is still an open issue. An image steganographic model is proposed that is based on variable-size LSB insertion to maximise the embedding capacity while maintaining image fidelity. For each pixel of a grey-scale image, at least four bits can be used for message embedding. Three components are provided to achieve the goal. First, according to contrast and luminance characteristics, the capacity evaluation is provided to estimate the maximum embedding capacity of each pixel. Then the minimum-error replacement method is adapted to find a grey scale as close to the original one as possible. Finally, the improved grey-scale compensation, which takes advantage of the peculiarities of the human visual system, is used to eliminate the false contouring effect. Two methods, pixelwise and bitwise, are provided to deal with the security issue when using the proposed model. Experimental results show effectiveness and efficiency of the proposed model     

Modelling quantisation error from quantised Laplacian distributions

Post-processing, restoration or transcoding of JPEG and MPEG compressed images require a quantisation error model of discrete cosine transform coefficients. A method is presented to recover the original probability density function (pdf) parameter from quantised data. Assuming that the original pdf of the coefficients is Laplacian. Quantisation errors are calculated from the Laplacian model     

Distributed sample acquisition-based fast cell search in inter-cellasynchronous DS/CDMA systems

We introduce a fast fell-search scheme based on the distributed sample acquisition (DSA) technique for inter-cell asynchronous DS/CDMA systems. The proposed DSA scheme enables the long-code acquisition extremely fast even without employing any passive matched filter which used to dominate synchronization circuit complexity in asynchronous DS/CDMA systems. In the DSA-based asynchronous DS/CDMA system, each base station spreads its DQPSK-modulated long-code generator information with an assigned short-period igniter sequence, and broadcasts it as a common pilot signal. A mobile station first identifies and acquires the igniter sequence of the cell group currently located, then detects the conveyed long-code generator information by despreading the acquired igniter sequence, thereby identifying and synchronizing the long-code of the current cell. The mean acquisition time of this proposed DSA-based inter-cell asynchronous DS/CDMA system, evaluated under the assumption that each of 512 cell-specific long-codes is a 10-ms segment (38400-chips for the chip rates of 3.84 Mchips/s) of complex Gold codes of period 2¹⁸-1 and the igniter sequence (or, group code) set is composed of 7 complex orthogonal Gold codes of period 256, turned out even shorter than that of the inter-cell synchronous DS/CDMA systems employing the conventional serial search method. Furthermore, simulation results showed that the DSA scheme employing a passive matched filter is much superior in terms of acquisition time and robustness, to the 3GPP W-CDMA synchronization scheme having comparable complexity     

Improved light-load efficiency for synchronous rectifier voltageregulator module

DC/DC converter with high efficiency over a wide load range is necessary for many low voltage applications, such as battery supplied systems and micro-processor power supplies-voltage regulator module (VRM). In order to improve the efficiency of low voltage converters, synchronous rectifier technology is widely used. The disadvantage of this technology is low efficiency at light load. This paper proposes a new technology, which utilizes the duty cycle signal, to improve light load efficiency with simple implementation. Since current sensors are not required, high density and high efficiency can be achieved that makes the whole circuit suitable for integration. In the paper, two application examples are given. Experimental results verified that the proposed control schemes significantly improve the efficiency of synchronous rectifier buck converters at light load     

Threshold voltage reduction model for buried channel PMOSFETs using quasi-2-D Poisson equation

A quasi-two-dimensional (2-D) threshold voltage reduction model for buried channel pMOSFETs is derived. In order to account for the coexistence of isoand anisotype junctions in a buried channel structure, we have incorporated charge sharing effect in the quasi-2-D Poisson model. The proposed model correctly predicts the effects of drain bias (V/sub DS/), counter doping layer thickness (x/sub CD/), counter doping concentration (N/sub CD/), substrate doping concentration (N/sub sub/) and source/drain junction depth (x/sub j/), and the new model performs satisfactorily in the sub-0.1 /spl mu/m regime. By using the proposed model on the threshold voltage reduction and subthreshold swing, we have obtained the process windows of the counter doping thickness and the substrate concentration. These process windows are very useful for predicting the scaling limit of the buried channel pMOSFET with known process conditions or systematic design of the buried channel pMOSFET.