Simultaneous Formation of Ohmic Contacts on p +- and n +-4H-SiC Using a Ti/Ni Bilayer

In this work, Ti/Ni bilayer contacts were fabricated on both p ⁺- and n ⁺-4H-SiC formed by ion implantation, and the effects of the Ti interlayer on the contact resistance and interfacial microstructure were studied. Adoption of a thin (10 nm) Ti interlayer resulted in specific contact resistance of 4.8 μΩ cm² and 1.3 mΩ cm² on n ⁺- and p ⁺-4H-SiC, respectively, comparable to the values for contacts using only Ni. Moreover, contacts using Ti/Ni provide a flat and uniform interface between Ni₂Si and SiC, whereas discontinuous, agglomerated Ni₂Si islands are formed without the use of a Ti interlayer. In addition, the Ti interlayer was demonstrated to effectively dissociate the thin oxide film on SiC, which is advantageous for low-resistance, reliable ohmic contact formation. In summary, use of a Ti/Ni bilayer is a promising solution for one-step formation of ohmic contacts on both p ⁺- and n ⁺-4H-SiC, being especially suitable for SiC n-channel metal-oxide-semiconductor field-effect transistor (nMOSFET) fabrication.     

Non-functionalized soluble diketopyrrolopyrrole: Simplest p-channel core for organic field-effect transistors

We report the synthesis, characterization and behavior in field-effect transistors of non-functionalized soluble diketopyrrolopyrrole (DPP) core with only a solubilizing alkyl chain (i.e. –C₁₆H₃₃ or –C₁₈H₃₇) as the simplest p-channel semiconductor. The characteristics were evaluated by UV–vis and fluorescence spectroscopy, X-ray diffraction, cyclic voltammetry (CV), thermal analysis, atomic force microscopy (AFM) and density functional theory (DFT) calculation. For top-contact field-effect transistors, two types of active layers were prepared either by a solution process (as a 1D-microwire) or thermal vacuum deposition (as a thin-film) on a cross-linked poly(4-vinylphenol) gate dielectric. All the devices showed typical p-channel behavior with dominant hole transports. The device made with 1D-microwiress of DPP-R18 showed field-effect mobility in the saturation region of 1.42 × 10^?2 cm²/V s with I_ON/I_OFF of 1.82 × 10³. These findings suggest that the non-functionalized soluble DPP core itself without any further functionalization could also be used as a p-channel semiconductor for low-cost organic electronic devices.     

Luminescence,charge mobility,and optical waveguiding of two-dimensional organic rubrene nanosheets: Comparison with one-dimensional nanorods

Intrinsic characteristics of organic and inorganic nanostructures depend on their physical dimensions (i.e., size and shape) and crystallinity. Here, we compared the nanoscale optical and electrical properties of organic rubrene one-dimensional (1-D) nanorods (NRs) and two-dimensional (2-D) nanosheets (NSs). From high-resolution laser confocal microscope photoluminescence (PL) measurements, the light-emission characteristics of 2-D rubrene NSs varied with the crystalline domain direction, indicating intrinsic PL anisotropy, which was distinguishable from 1-D rubrene single NRs, because of anisotropy π–π stacking molecular arrangements. We also observed the variation of charge carrier mobility depending on the measured directions (i.e., anisotropy of charge transport) in rubrene NS-based field-effect transistors. The optical waveguiding properties of rubrene nanostructures were strongly correlated to the dimensionality of materials and PL anisotropy.     

Strain‐Visualization with Ultrasensitive Nanoscale Crack‐Based Sensor Assembled with Hierarchical Thermochromic Membrane

As eidetic signal recognition has become important, displaying mechanical signals visually has imposed huge demands for simple readability and without complex signal processing. Such visualization of mechanical signals is used in delicate urgent medical or safety‐related industries. Accordingly, chromic materials are considered to facilitate visualization with multiple colors and simple process. However, the response and recovery time is very long, such that rapid regular signals are unable to be detected, i.e., physiological signals, such as respiration. Here, the simple visualization of low strain ≈2%, with ultrasensitive crack‐based strain sensors with a hierarchical thermochromic layer is suggested. The sensor shows a gradient color change from red to white color in each strain, which is attributed to the hierarchical property, and the thermal response (recovery) time is dramatically minimized within 0.6 s from 45 to 37 °C, as the hierarchical membrane is inspired by termite mounds for efficient thermal management. The fast recovery property can be taken advantage of in medical fields, such as monitoring regular respiration, and the color changes can be delicately monitored with high accuracy by software on a mobile phone.     

Three-state synchronization of distributed sample scramblers in thepresence of errors

In this paper, we consider the behaviors and performances of the three-state-based synchronization mechanisms of DSS in the errored environment. We establish a mathematical model to describe the synchronization mechanisms by employing the sequence space theory, and discuss the behaviors of the two different three-state synchronization schemes-the ITU-T recommended thresholded-counting scheme and the newly proposed windowed-observation scheme. We consider the design guidelines for the synchronization schemes, and finally compare their performances in the cell-based ATM     

Optimal CSMA scheduling with dual access probability for wireless networks

Wireless Networks - Recently optimal Carrier Sense Multiple Access (CSMA) scheduling schemes have attracted much attention in wireless networks due to their low complexity and provably optimal...     

Improved device performances in polymer light-emitting diodes using a stamp transfer printing process

The device performances of spin-coated and stamp transfer printed devices were compared. There was little difference of morphology between the spin-coated and stamp transfer printed devices. However, the stamp transfer printing process was better than the spin-coating process in terms of current density, light-emitting efficiency and lifetime. In particular, the lifetime of the stamp transfer printed device was doubled compared with that of the spin-coated device.     

High‐Performance Dual‐Circularly Polarized Reflector Antenna Feed

This paper presents a high‐performance dual‐circularly polarized feed employing a dielectric‐filled circular waveguide. Novel features are incorporated in the proposed feed, such as a dielectric rod radiator for high gain and good impedance matching; dual quarter‐wave chokes for low axial ratio over wide angles and for low back radiation; an integrated septum polarizer; and two end‐launch‐type coaxial‐to‐waveguide transitions. The proposed feed shows excellent performance at 5.0 GHz to 5.2 GHz.     

A low-noise, low-power VCO with automatic amplitude control forwireless applications

Voltage controlled oscillators (VCOs) used in portable wireless communications applications, such as cellular telephony, are required to achieve low phase-noise levels while consuming minimal power. This paper presents the design challenges of a VCO with automatic amplitude control, which operates in the 300 MHz to 1.2 GHz frequency range using different external resonators. The VCO phase noise level is -106 dBc/Hz at 100-KHz offset from an 800-MHz carrier, and it consumes 1.6 mA from a 2.7-V power supply. An extensive phase-noise analysis is employed for this VCO design in order to identify the most important noise sources in the circuit and to find the optimum tradeoff between noise performance and power consumption     

RTD/CMOS nanoelectronic circuits: thin-film InP-based resonanttunneling diodes integrated with CMOS circuits

The combination of resonant tunneling diodes (RTDs) and complementary metal-oxide-semiconductor (CMOS) silicon circuitry can offer substantial improvement in speed, power dissipation, and circuit complexity over CMOS-only circuits. We demonstrate the first integrated resonant tunneling CMOS circuit, a clocked 1-bit comparator with a device count of six, compared with 21 in a comparable all-CMOS design. A hybrid integration process is developed for InP-based RTDs which are transferred and bonded to CMOS chips. The prototype comparator shows sensitivity in excess of 10⁶ VIA, and achieves error-free performance in functionality testing. An optimized integration process, under development, can yield high-speed, low power circuits by lowering the high parasitic capacitance associated with the prototype circuit