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41.
An analytical model for electroluminescence in SrS:Ce AC thin-film electroluminescent display devices is presented. The model incorporates an exact calculation of the electric field and the effect of activator ionization and bulk traps. Activator ionization is needed to explain several features of luminescence behavior in SrS:Ce devices. These features include the second luminescence peak at the trailing edge of the voltage pulse and the time lag between the luminescence and the applied voltage when the applied voltage consists of bipolar trapezoidal pulses and rectangular pulses of low voltage amplitudes. As a mechanism for the ionization of activators, field-assisted tunneling is shown to be more likely than impact ionization by hot electrons. Physical processes are described in terms of rate equations, and field, current, and luminescence waveforms are calculated for one set of device parameters. The calculated and experimental luminescence waveforms agree 相似文献
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Dasgupta U. Wooi Gan Yeoh Chun Geik Tan Sheng Jau Wong Mori H. Singh R. Itoh M. 《Microwave Theory and Techniques》2002,50(11):2443-2452
An implementation of the IF section of WCDMA mobile transceivers with a set of two chips fabricated in an inexpensive 0.35-/spl mu/m two-poly three-metal CMOS process is presented. The transmit/receive chip set integrates quadrature modulators and demodulators, wide dynamic range automatic gain control (AGC) amplifiers, with linear-in-decibel gain control, and associated circuitry. This paper describes the problems encountered and the solutions envisaged to meet stringent specifications, with process and temperature variations, thus overcoming the limitations of CMOS devices, while operating at frequencies in the range of 100 MHz-1 GHz. Detailed measurement results corroborating successful application of the new techniques are reported. A receive AGC dynamic range of 73 dB with linearity error of less than /spl plusmn/2 dB and spread of less than 5 dB for a temperature range of -30/spl deg/C to +85/spl deg/C in the gain control characteristic has been measured. The modulator measurement shows a carrier suppression of 35 dB and sideband/third harmonic suppression of over 46 dB. The core die area of each chip is 1.5 mm/sup 2/. 相似文献
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Maestre R. Kurdahi F.J. Fernandez M. Hermida R. Bagherzadeh N. Singh H. 《Circuits and Systems Magazine, IEEE》2002,2(4):48-51
Reconfigurable computing is consolidating itself as a real alternative to ASICs (Application Specific Integrated Circuits) and general-purpose processors. The main advantage of reconfigurable computing derives from its unique combination of broad applicability, provided by the reconfiguration capability, and achievable performance, through the potential parallelism exploitation. The key aspects of the scheduling problem in a reconfigurable architecture are discussed, focusing on a task scheduling methodology for DSP and multimedia applications, as well as the context management and scheduling optimizations. 相似文献