Evaluation of signalling loads in a cognitive network management architecture

Future networks will need to accommodate a significantly augmented user demand, mainly stemming from the wireless and mobile domains. In general, the emerging radio landscape will comprise multiple, collaborating radio access networks (RANs) able to operate a plethora of diverse radio access technologies (RATs), variant types of mobile terminals (MTs), with the ability to choose among various supported RANs/RATs and, in addition, both devices and networks with dynamic spectrum access capabilities that allow the sharing and/or optimization of spectrum usage among different systems. The above will stress network operators for developing mechanisms to confront the challenges and to leverage the opportunities posed by such a versatile radio environment. In particular, the situation calls for adaptive and flexible management paradigms that are able to dynamically manage network elements and terminals, thus ensuring the great availability and efficient usage of spectrum and other radio resources. Framed within the above, this paper considers a cognitive network management architecture, which is destined for optimized management of future wireless networks operating in versatile radio environments, and presents a performance evaluation methodology, which was set up for measuring the signalling loads that the operation of the architecture will bring to the managed network. The methodology is analytically described, and useful results with respect to the signalling load produced for management signalling purposes in an indicative scenario are presented and analysed. Copyright © 2011 John Wiley & Sons, Ltd.     

Integration of InGaP/GaAs/Ge triple‐junction solar cells on deeply patterned silicon substrates

We report preliminary results on InGaP/InGaAs/Ge photovoltaic cells for concentrated terrestrial applications, monolithically integrated on engineered Si(001) substrates. Cells deposited on planar Ge/Si(001) epilayers, grown by plasma‐enhanced chemical vapor deposition, provide good efficiency and spectral response, despite the small thickness of the Ge epilayers and a threading dislocation density as large as 10⁷/cm². The presence of microcracks generated by the thermal misfit is compensated by a dense collection grid that avoids insulated areas. In order to avoid the excessive shadowing introduced by the use of a dense grid, the crack density needs to be lowered. Here, we show that deep patterning of the Si substrate in blocks can be an option, provided that a continuous Ge layer is formed at the top, and it is suitably planarized before the metalorganic chemical vapor deposition. The crack density is effectively decreased, despite that the efficiency is also lowered with respect to unpatterned devices. The reasons of this efficiency reduction are discussed, and a strategy for improvement is proposed and explored. Full morphological analysis of the coalesced Ge blocks is reported, and the final devices are tested under concentrated AM1.5D spectrum. Copyright © 2016 John Wiley & Sons, Ltd.     

An electronically tunable microstrip bandpass filter using thin-film Barium-Strontium-Titanate (BST) varactors

A tunable third-order combline bandpass filter using thin-film barium-strontium-titanate varactors and fabricated on a sapphire substrate is reported. Application of 0-200-V bias varied the center frequency of the filter from 2.44 to 2.88 GHz (16% tuning) while achieving a 1-dB bandwidth of 400 MHz. The insertion loss varied from 5.1 dB at zero bias to 3.3 dB at full bias, while the return loss exceeded 13 dB over the range. The third-order intercept of the filter was found to be 41 dBm.     

Network and single user performance evaluation of a mobile data system over flat fading transmission channels

In this paper the contrasting effects of transmission impairments and capture on both the network and single user performance of a slotted Aloha system are investigated in a mobile radio environment, accounting for frequency non-selective random propagation phenomena, and employing the packet error probability in order to define packet losses and capture. With this study we demonstrate that it is possible to generalize in a real propagation context a method previously proposed in literature for evaluating the network behavior in terms of steady-state throughput, backlog and stability in conventional transmission conditions, i.e., when all the transmission channels were error-free and the collisions caused the loss of all the packets involved. Moreover, we indicate under which specific constraints on the terminal mobility we can apply this method to analytically predict the single user performance, which we show being an important design parameter. Through the numerical results reported we quantitatively point out that in the absence of coding capture increases system stability and moderately improves the overall system throughput and backlog. We also outline the trade-off between an increased capture gain obtained by means of coding and the corresponding system cost in terms of complexity and bandwidth occupancy. Furthermore, we demonstrate the unfairness which affects the single user performance and the consequent need for countermeasures in order not to discriminate among users differently located within the network; yet, this last solution is detrimental as regards the positive capture effects.This work was supported by M.U.R.S.T. and C.N.R. (Italy).     

Chloride and Indium‐Chloride‐Complex Inorganic Ligands for Efficient Stabilization of Nanocrystals in Solution and Doping of Nanocrystal Solids

Here, the surface functionalization of CdSe and CdSe/CdS core/shell nanocrystals (NCs) with compact chloride and indium‐chloride‐complex ligands is reported. The ligands provide not only short interparticle distances but additionally control doping and passivation of surface trap states, leading to enhanced electronic coupling in NC‐based arrays. The solids based on these NCs show an excellent electronic transport behavior after heat treatment at the relatively low temperature of 190 °C. Indeed, the indium‐chlorido‐capped 4.5 nm CdSe NC based thin‐film field‐effect transistor reaches a saturation mobility of μ = 4.1 cm² (V s)^?1 accompanied by a low hysteresis, while retaining the typical features of strongly quantum confined semiconductor NCs. The capping with chloride ions preserves the high photoluminescence quantum yield ( ≈ 66%) of CdSe/CdS core/shell NCs even when the CdS shell is relatively thin (six monolayers). The simplicity of the chemical incorporation of chlorine and indium species via solution ligand exchange, the efficient electronic passivation of the NC surface, as well as their high stability as dispersions make these materials especially attractive for wide‐area solution‐processable fabrication of NC‐based devices.     

The influence of hydrogen and nitrogen on the formation of Si nanoclusters embedded in sub-stoichiometric silicon oxide layers

This work reports the study concerning the influence of the preparation conditions on the structure of silicon rich oxide (SRO) deposited by PECVD method by which the structural properties of the film are strictly related. In particular we investigated the role of reactant gases N₂O and SiH₄ on the total Si concentration, Si excess concentration, Si clustered concentration and size of nanoclusters formed by high annealing temperature. We payed particular attention on the role of the hydrogen and nitrogen during the Si agglomeration.The presence of hydrogen atoms on the as-deposited specimen, confirmed by the Si–H bonds peak on the FTIR analysis, has been directly correlated to the silicon excess concentration in the layer. The silicon, oxygen and nitrogen atomic density has been calculated from RBS analysis. These information were coupled to the ones obtained using methodology based on electron energy loss spectroscopy combined with energy filtered images, which allowed us to quantify the clustered silicon concentration in annealed sub-stoichiometric silicon oxide layers (SiO_x). We have verified that the nitrogen dissolved in the layer inhibits the Si excess clustering so that the efficiency of silicon agglomeration process decreases as the nitrogen content increases.     

Capacity Optimization in TDMA Ad-Hoc Networks

Many scheduling techniques have been developed to solve the problem of sharing the common channel to multiple stations. TDMA has been increasingly used as a scheduling technique in ad-hoc networks. The current trend for QoS capable applications led to the deployment of numerous routing schemes that use TDMA. These schemes try to solve the problem of distributing the available slots among the wireless nodes and at the same time, to find paths within the network that fulfill some QoS related limitations, such as end-to-end delay. The exact way the slots are distributed among the transmitting nodes has an impact on the end-to-end delay and other performance parameters of the network, such as capacity. Therefore, the efficiency of the scheduling algorithms is closely related to the network topologies. In this paper, we propose two new end-to-end TDMA scheduling algorithms that try to enhance the network capacity by increasing the number of concurrent connections established in the network, without causing additional end-to-end delay. We study the efficiency of the proposed algorithms, when applied on various random topologies, and compare them in terms of end-to-end delay and network capacity.     

Propagation Path Loss and Materials Insertion Loss in Indoor Environment at WiMAX Band of 3.3 to 3.6?GHz

The purpose of this study is to characterize the indoor channel for IEEE 802.16 (WiMAX) at 3.3?C3.6?GHz frequency. This work presents a channel model based on measurements conducted in commonly found scenarios in buildings. These scenarios include closed corridor, wide corridor and semi open corridor. Path loss equations are determined using log-distance path loss model and a Rayleigh multipath induced fading, Normal multipath induced fading or a combination of both. A numerical analysis of measurements in each scenario was conducted and the study determined equations that describe path loss for each scenario. Propagation loss is given for 300?MHz bandwidth. This work also represents the insertion loss of different materials and the obstruction loss due the existence of human beings between the transmitting antenna and the receiving one.     

Low Cost BIST for Static and Dynamic Testing of ADCs

This paper presents a low cost test method for the static and dynamic characterization of analog-to-digital converters. The method is suitable for implementation in a SoC environment, as a built-in self test (BIST) solution. In the proposed approach, noise is used as the test signal. Theory of operation and practical results demonstrating the effectiveness of the method for INL, DNL, THD and SINAD characterization are presented. The BIST surface overhead caused by the noise generator is only 7.4% of the ADC total area. The reduced number of data samples required allows a reduction of about 7.5× in test time, in comparison to the histogram method.Maria da Gloria Cataldi Flores was born in Santa Maria, Brazil, in 1978. She received the electrical engineering degree in 2000 from Universidade Federal de Santa Maria (UFSM) and the M.S. degree engineering in 2003 from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then, she has been working as a design engineer in an EAS Supply brazilian company. Her main research interests include mixed-signal and analog testing and digital signal processing.Marcelo Negreiros was born in Porto Alegre, Brazil, in 1969. He received the electrical engineering degree in 1992 and the M.S. degree engineering in 1994, both from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then he was been working as an associate researcher in the Signal Processing Lab. (LaPSI) of the Electrical Engineering Department at UFRGS. Since 2000 he also works toward a Ph.D. in Computer Science from UFRGS. His main research interests include mixed-signal and analog testing and digital signal processing.Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the M.Sc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Ph.D. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design and Digital Signal processing disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in Embedded Systems, Digital Signal Processing, and VLSI Design. His primary research interests include mixed-signal design, digital signal processing, mixed-signal and analog testing, and fast system prototyping. He has published more than 90 technical papers in those topics and is the author of the book Digital Systems Design and Prototyping (in portuguese).Altamiro A Susin was born in Vacaria-RS, Brazil, in 1945. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1972 and 1977, respectively. Since 1968 he worked in the start up of Computer Centers of two local Universities. In 1981 he got his Dr. Eng degree from Institut National Polytechnique de Grenoble-France. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible by courses in VLSI Architecture and is also thesis director. His main research interests are Integrated Circuit Architecture, Embedded Systems, Signal Processing with more than 50 technical papers published in those domains. He is/was responsible for several R&D projects either funded with public and/or industry resources.Felipe Ricardo Clayton received the B.S. degree in Electrical Engineering from State University of Campinas (UNICAMP), Brazil, in 1986. He worked at CPqD (Brazilian PTT R&D Center) till 1996 designing analog and mixed signal circuits for telecom and automotive applications. From 1997 to the second half of 1998, he worked at Instituto Superior Técnico (IST), Lisbon, Portugal, under the guidance of Prof. Carlos Azeredo Leme on development of CMOS RF circuits. Since October 1998 he had worked for Motorola SPS. Now he is head of the Power Managment Group at Freescale.Cristiano Benevento received his B.S. degree in Electrical Engineering from Universidade Estadual de Campinas (Unicamp), Brazil, in 1997. He worked at Motorola Cellular Infrastructure Group until August 2000 as a Systems Engineer. He joined Motorola Semiconductor Product Sector in August 2000 as IC Designer for Power Management Group and is now at Freescale.