舰载高频OTH雷达回波的实时模拟

针对舰载高频地波OTH雷达回波模拟的需要，从发射和接收基带信号相位的角度研究目标回波及海杂波实时模拟的方案。模拟时不但要保证真实性，还要保证实时性，即要保证模拟方案的计算量不能过大。考虑到上述要求，提出了将发射基带信号根据需要适当延时得到接收基带信号，并将目标多普勒信息与其叠加。对该方案分析表明，尤为适用于舰载OTH雷达海杂波的实时模拟，并给出了模拟结果，与实际采集的海杂波对比表明，该方案的模拟效果较好。     

Comparative study of drift region designs in RF LDMOSFETs

Systematic investigation of the drift region design of the RF LDMOSFET in terms of breakdown voltage, on-resistance, transconductance, capacitance and hot-carrier effects is presented. The incorporation of a source field plate allows for an increase of drift dose for a given breakdown voltage, which eases the tradeoff between the breakdown voltage and on-resistance, and the breakdown voltage and transconductance. However, the increased dose can significantly degrade hot-carrier reliability. A step-drift has enhanced hot-carrier immunity and lower capacitance, but, at the cost of increased on-state resistance and lower transconductance. Furthermore, a second origin of hot carriers is reported in the step-drift design, which may cause damage in the drift region. A deeper drift region design, which does not require an additional mask in comparison to the step-drift design, is investigated. The proposed approach shares all the advantages provided by the field plate design. Moreover, the lower concentration in the new drift region design leads to enhanced hot-carrier immunity.     

A 21-mW 8-b 125-MSample/s ADC in 0.09-mm/sup 2/ 0.13-/spl mu/m CMOS

This paper presents an 8-b two-step subranging analog-to-digital (ADC) using interpolation, averaging, offset compensation, and pipelining techniques to accomplish an effective number of bits of 7.6 b at 125 MSample/s. The 0.13-/spl mu/m CMOS ADC occupies 0.09 mm/sup 2/ and consumes 21 mW.     

Highly linear 2.5-V CMOS /spl Sigma//spl Delta/ modulator for ADSL+

We present a 90-dB spurious-free dynamic range sigma-delta modulator (/spl Sigma//spl Delta/M) for asymmetric digital subscriber line applications (both ADSL and ADSL+), with up to a 4.4-MS/s digital output rate. It uses a cascade (MASH) multibit architecture and has been implemented in a 2.5-V supply, 0.25-/spl mu/m CMOS process with metal-insulator-metal capacitors. The prototypes feature 78-dB dynamic range (DR) in the 30-kHz to 2.2-MHz band (ADSL+) and 85-dB DR in the 30-kHz to 1.1-MHz band (ADSL). Integral and differential nonlinearity are within /spl plusmn/0.85 and /spl plusmn/0.80 LSB/sub 14 b/, respectively. The /spl Sigma//spl Delta/ modulator and its auxiliary blocks (clock phase and reference voltage generators, and I/O buffers) dissipate 65.8 mW. Only 55 mW are dissipated in the /spl Sigma//spl Delta/ modulator.     

A building-transmission model for improved propagation prediction in urban microcells

This paper presents a model for the propagation of radiowaves through buildings. The model can be used as a seamless extension to ray-based propagation prediction models that only consider external reflection and diffraction, as do most current models. This involves the use of so-called transmitted rays, which are traced through building walls. Outdoor-to-indoor propagation (building penetration) is automatically taken into account as a "by-product". The transmission model requires no information about each building's interior other than a specific attenuation factor that describes the global behavior of the field inside the building. This coefficient can be determined for individual buildings by measuring the excess loss associated with the propagation path through the building. It is shown, however, that no large errors are to be expected if all buildings are characterized by the average of the empirical values obtained in this study, at 1.9 GHz. Path loss predictions generated with the aid of the new model are shown and compared with measured data to illustrate the considerable improvement in accuracy that can be achieved in realistic urban microcell scenarios by taking into account building penetration and transmission.     

Performance Evaluation of Packet Mobile Communications through Level Crossing Analysis

In this paper the performance of a packet mobile radio network is studied inthe presence of shadow fading outage intervals.Under quite general assumptions for the medium access protocol,the probability mass function of the sequence of packets that may be lostdue to an outage interval is derived. It is seen that long sequences of lostpackets are likely to occur for typical values of the mobile speed andshadowing correlation parameters.For delay constrained sources, e.g., voice, the analysis is mainly focused atderiving the probability function of the sequence of dropped packetsand the probability of dropping. For data sources, the delay statistic isalso derived. In the latter case, the effect of finite buffer length isaddressed. Simulation is used to verify the accuracy of approximations introduced in the analysis.     

Spatiotemporal EEG/MEG source analysis based on a parametric noise covariance model

A method is described to incorporate the spatiotemporal noise covariance matrix into a spatiotemporal source analysis. The essential feature is that the estimation problem is split into two parts. First, a model is fitted to the observed noise covariance matrix. This model is a Kronecker product of a spatial and a temporal matrix. The spatial matrix models the spatial covariances by a function dependent on sensor distance. The temporal matrix models the temporal covariances as lag dependent. In the second part, sources are estimated given this noise model, which can be done very efficiently due to the Kronecker formulation. An application to real electroencephalogram (EEG) data shows that the noise model fits the data very well. Simulation results show that the resulting source estimates are more precise than those obtained from a standard analysis neglecting the noise covariance. In addition, the estimated standard errors of the source parameter estimates are far more precise than those obtained from a standard analysis. Finally, the source parameter standard errors are used to investigate the effects of temporal sampling. It is shown that increasing the sampling by a factor x, decreases the standard errors of all source parameters with the square root of x.     

Editorial: Security and Privacy in Internet of Things

Mobile Networks and Applications -     

Error correction techniques for high-performance differential A/Dconverters

Error correction techniques that overcome several error mechanism that can affect the accuracy of charge-redistribution analog-to-digital converters (ADCs) are described. A correction circuit and a self-calibration algorithm are used to improve the common-mode rejection of the differential ADC. A modified technique is used to self-calibrate the capacitor ratio errors and obtain higher linearity. The residual error of the ADC due to capacitor voltage dependence is minimized using a quadratic voltage coefficient (QVC) self-calibration scheme. A dual-comparator topology with digital error correction circuitry is used to avoid errors due to comparator threshold hysteresis. A fully differential charge-redistribution ADC implemented with these techniques was fabricated in a 5-V 1-μm CMOS process using metal-to-polysilicide capacitors. The successive-approximation converter achieves 16-b accuracy with more than 90 dB of common-mode rejection while converting at a 200-kHz rate