Digitally tunable optical filters using arrayed-waveguide grating(AWG) multiplexers and optical switches

Two novel configurations for digitally tunable optical filters based on arrayed-waveguide grating (AWG) multiplexers are described in detail with emphasis on the connection of the AWG multiplexer and optical switches. Performance comparisons show that conventional configurations are disadvantaged by the switch size required and loss imbalance among the optical frequency-division-multiplexed (FDM) channels; the proposed configurations require only O(√(N)) switch elements to select one of N FDM channels, and the loss imbalance is lower by up to 75% in decibel     

A new lateral MOS-gated thyristor with controlling base-current

A new lateral MOS-gated thyristor, called the Base-Current-Controlled Thyristor, is described. This device is designed so that most holes at the on-stage reach the P base through the floating P⁺ region adjacent to the P base and the on-state MOSFET. At the turn-off stage, the interruption of the hole current to the P base due to switching off the above MOSFET occurs simultaneously with the conventional turn-off operation. The concept of this device is verified experimentally by using the fabricated lateral device with the external MOSFET. This device exhibits a better trade-off relation between the on-state voltage and the turn-off time compared uith the conventional MOS-gated thyristor     

Series equivalence/operation of current-controlled boost-typesingle-phase voltage source converters for bidirectional power flow

Single-phase voltage source power converters (VSCs) under consideration are AC-DC current-controlled boost-type power converters with bidirectional power-handling capability. Equivalence between two series-connected two-level power converters and a single three-level power converter is considered here. Further considered is the series operation of three-level power converters. Simulation results and experimental verification for both are provided. Economical configurations of three-level power converters leading to multilevel waveforms are presented thereafter     

A wafer level monitoring method for plasma-charging damage usingantenna PMOSFET test structure

A novel monitoring method for plasma-charging damage is proposed. This method performs a quick and accurate evaluation using antenna PMOSFET. It was found that not only hot-carrier (HC) lifetime but transistor parameters such as initial gate current and substrate current were changed according to the degree of plasma-charging damage. However, the present work suggests that monitoring the shift of drain current after a few seconds of HC stress is a more accurate method to indicate plasma-charging damage. The monitoring method using the present test structure is demonstrated to be useful for realizing highly reliable devices     

A unified diode model for circuit simulation

A new commercially available diode model is described. This unified model is capable of simulating the widest range of diode technologies of any presently available. The emphasis of this paper is on describing the model's extensive features and flexibility in the different domains of operation and is of particular interest in power applications     

Low-truncation-error finite difference equations for photonicssimulation. II. Vertical-cavity surface-emitting lasers

For part I see, ibid., p. 134, 1998. The basic approach outlined in the previous article is applied to the difficult problem of computing the optical modes of a vertical-cavity surface-emitting laser. The formulation utilizes a finite difference equation based upon the lowest order term of an infinite series solution of the scalar Helmholtz equation in a local region. This difference equation becomes exact in the one-dimensional (1-D) limit, and is thus ideally suited for nearly 1-D devices such as vertical-cavity lasers. The performance of the resulting code is tested on both a simple cylindrical cavity with known solutions and an oxide-confined vertical-cavity laser structure, and the results compared against second-order-accurate code based upon Crank-Nicolson differencing     

E-kernel: an embedding kernel on the IBM victor V256 multiprocessorfor program mapping and network reconfiguration

We present the design of E-kernel, an embedding kernel on the Victor V256 message-passing partitionable multiprocessor, developed for the support of program mapping and network reconfiguration. E-kernel supports the embedding of a new network topology onto Victor's 2D mesh and also the embedding of a task graph onto the 2D mesh network or the reconfigured network. In the current implementation, the reconfigured network can be a line or an even-size ring, and the task graphs meshes or tori of a variety of dimensions and shapes or graphs with similar topologies. For application programs having these task graph topologies and that are designed according to the communication model of E-kernel, they can be run without any change on partitions connected by the 2D mesh, line, or ring. Further, E-kernel attempts the communication optimization of these programs on the different networks automatically, thus making both the network topology and the communication optimization attempt completely transparent to the application programs. Many of the embeddings used in E-kernel are optimal or asymptotically optimal (with respect to minimum dilation cost). The implementation of E-kernel translated some of the many theoretical results in graph embeddings into practical tools for program mapping and network reconfiguration in a parallel system. E-kernel is functional on Victor V256. Measurements of E-kernel's performance on V256 are also included     

Algebra of algorithms and Kaluzhnin's graphschemas

This research was supported under project No. 6.02.02/128-93 as part of the state scientific-technical program on future information technologies and systems by the Ukrainian State Committee, of Science and Technology.     

Components of random generation by normal subjects and patients with dysexecutive syndrome

The study presents a hypothesis on how randomness could be simulated by human subjects. Three sources of deviation from randomness are predicted: (1) the preferred application of overlearned production schemata for producing sequences of digits, (2) a wrong concept of randomness, and (3) the impossibility to monitor for redundancies of higher- than those of first-order. Deviations of random generation of digits produced by healthy subjects, patients with chronic frontal lobe damage, and patients with Parkinson's disease from random sequences produced by a computer program can be explained by the differential influence of these factors. Whereas incorrect concepts of randomness and limits on monitoring capacity distinguished all sequences produced by humans from actual random sequences, persistence on a single production strategy distinguished brain-damaged patients from controls. Random generation of digits appears to be a theoretically transparent and clinically useful test of executive function.