Efficient reconfigurable techniques for VLSI arrays with 6-port switches

This paper proposes an efficient techniques to reconfigure a two-dimensional degradable very large scale integration/wafer scale integration (VLSI/WSI) array under the row and column routing constraints, which has been shown to be NP-complete. The proposed VLSI/WSI array consists of identical processing elements such as processors or memory cells embedded in a 6-port switch lattice in the form of a rectangular grid. It has been shown that the proposed VLSI structure with 6-port switches eliminates the need to incorporate internal bypass within processing elements and leads to notable increase in the harvest when compared with the one using 4-port switches. A new greedy rerouting algorithm and compensation approaches are also proposed to maximize harvest through reconfiguration. Experimental results show that the proposed VLSI array with 6-port switches consistently outperforms the most efficient alternative proposed in literature, toward maximizing the harvest in the presence of fault processing elements.     

部分耗尽SOI体接触nMOS器件的关态击穿特性

分别采用具有硅化物和不具有硅化物的SOI工艺制成了部分耗尽SOI体接触nMOS晶体管.在体接触浮空和接地的条件下测量了器件的关态击穿特性.通过使用二维工艺器件模拟,并测量漏体结的击穿特性,详细讨论和分析了所制成器件击穿特性的差异和击穿机制.在此基础上,提出了一个提高PD-SOI体接触nMOS击穿特性的方法.     

应用于MEMS的单晶硅上无电镀铜、镀镍工艺

开发了单晶硅上的选择性无电镀铜、镀镍工艺,形成了较为优化的施镀流程,实现了保形性、均镀性较好的铜、镍及其复合镀层.其中针对单晶硅表面的特点,采取了浓酸处理和氧等离子轰击两种表面预处理方法,优化了氯化钯对表面的激活时间,使得镀层质量得到提高.提出了以镍作为中间层以减小镀层应力的方法,施镀后获得的铜镀层的电阻率为2.1μΩ·cm,铜/镍复合镀层的方块电阻为0.19Ω/□.在单晶硅MEMS电感结构上实现了较好的无电镀铜,使得该元件的品质因数超过25.     

光电耦合器件g-r噪声模型

在宽范围偏置条件下,测量了光电耦合器件的g-r(产生-复合)噪声.实验结果表明,随着偏置电流的增加,g-r噪声逐渐向高频移动,其噪声幅值呈现先增加后减小的变化规律.通过测量前级噪声和后级噪声,发现光电耦合器件g-r噪声来源于后级的光敏三极管.基于载流子数涨落机制,建立了一个光电耦合器件g-r噪声的定量分析模型.实验结果和本文模型符合良好.     

运算放大器不同剂量率的辐射损伤效应

对几种不同类型(TTL,CMOS,JFET-Bi,MOS-Bi)的典型星用运算放大器在不同剂量率(100,10,1及0.01rad(Si)/s)辐照下的响应规律及随时间变化的退火特性进行了研究.结果显示不同类型运放电路的辐照响应有明显差异:双极运放电路辐照剂量率越小,其损伤越大;CMOS运放电路对不同剂量率的响应并非线性关系,但不同剂量率辐照损伤的差异,可以通过与低剂量率相同时间的室温退火得到消除,本质上仍然是与时间相关的效应;JFET输入运放不仅有低剂量率辐照损伤增强效应存在,且辐照后还有明显的"后损伤"现象;PMOS输入运放的结果则表明,各辐照剂量率间的损伤无明显区别.     

Ku波段源极调谐HFET MMIC VCO

利用S参数分析和负阻分析设计了一个源端调谐的Ku波段HFET单片集成VCO,并获得了一次设计投片成功.提取了GaAs HFET的大信号模型,利用栅源终端阻抗的二维扫描确定了漏极负阻,以此为依据进行输出匹配网络的优化设计.给出了电路制作和测试结果,在17.79～17.89GHz频率上获得了16dBm的输出功率.     

单电子数据转换电路

提出了两种新型的由单电子晶体管、MOS管和电容组成的数模转换(ADC)和模数转换(DAC)电路.这种混合ADC和DAC电路可在室温条件下工作且负载能力大,功耗低.对这种混合单电子晶体管和MOS管的ADC和DAC电路进行了仿真,仿真结果表明两种电路能够在室温条件下正常工作.采样频率达到100MHz以上,功耗约为0.1μW.     

Bandwidth‐guaranteed QoS routing of multiple parallel paths in CDMA/TDMA ad hoc wireless networks

This paper investigates the issues of QoS routing in CDMA/TDMA ad hoc networks. Since the available bandwidth is very limited in ad hoc networks, a QoS request between two nodes will be blocked if there does not exist a path that can meet the QoS requirements, even though there is enough free bandwidth in the whole system. In this paper, we propose a new scheme of using multiple paths between two nodes as the route for a QoS call. The aggregate bandwidth of the multiple paths can meet the bandwidth requirement of the call and the delays of these paths are within the required bound of the call. We also propose three strategies by which to choose a set of paths as the route, namely, shortest path first (SPF), largest bandwidth first (LBF), and largest hop‐bandwidth first (LHBF). Extensive simulations have been conducted to evaluate the performance of the three strategies in comparison with a traditional single path routing algorithm. The simulation results show that the proposed multiple paths routing scheme significantly reduces the system blocking rates in various network environments, especially when the network load is heavy. Copyright © 2005 John Wiley & Sons, Ltd.     

Performance evaluation on a double‐layered satellite network

How to evaluate the performance of satellite networks is a prerequisite to the construction of satellite networks, and is also one of challenges in the researches on satellite networks. In this paper, generalized stochastic Petri net (GSPN) models are presented to carry out the performance analysis of a double‐layered satellite network. Firstly, the GSPN model of a double‐layered satellite network is simplified by proper analysis. Then, two sets of experiments are conducted to analyse the performance of the satellite networks, and show that the double‐layered satellite network outperforms single‐layered ones on the heavy traffic load. Finally, the feasibility and effectiveness of the proposed approach is verified by simulation experiments. Copyright © 2005 John Wiley & Sons, Ltd.     

0.2～1μmIC生产线中二手Stepper解决方案

通过对国内IC生产线及其Stepper装备的现状、市场前景的分析,阐述了国内0.2～1μmIC生产线中二手Stepper解决方案。