Preparation and analysis of amorphous carbon films deposited from (C6H12)/Ar/He chemistry for application as the dry etch hard mask in the semiconductor manufacturing process

Amorphous carbon layers (ACL) were deposited on Si (100) wafers by plasma enhanced chemical vapor deposition (PECVD) by using 1-hexene (C₆H₁₂) as a carbon source for dry etch hard mask of semiconductor devices manufacturing process. The deposition characteristics and film properties were investigated by means of ellipsometry, Raman spectroscopy, X-ray photo electron spectroscopy (XPS) and stress analysis. Hardness, Young's modulus, and surface roughness of ACL deposited at 550 °C were investigated by using nano-indentation and AFM. The deposition rate was decreased from 5050 Å/min to 2160 Å/min, and dry etch rate was decreased from 2090 Å/min to 1770 Å/min, and extinction coefficient was increased from 0.1 to 0.5. Raman analysis revealed a higher shift of the G-peak and a lower shift of the D-peak and the increase of I(D)/I(G) ratio as the deposition temperature was increased from 350 °C to 550 °C. XPS results of ACL deposited at 550 °C revealed a carbon 1s binding energy of 284.4 eV. The compressive film stress was decreased from 2.95 GPa to 1.28 GPa with increasing deposition temperature. The hardness and Young's modulus of ACL deposited at 550 °C were 5.8 GPa and 48.7 GPa respectively. The surface roughness RMS of ACL deposited at 550 °C was 2.24 Å, and that after cleaning in diluted HF solution (H₂O:HF = 200:1), SC1 (NH₄OH:H₂O₂:H₂O = 1:4:20) solution, and sulfuric acid solution (H₂SO₄:H₂O₂ = 6:1) was 2.28 Å, 2.30 Å and 7.34 Å, respectively. The removal amount of ACL deposited at 550 °C in diluted HF solution, SC1 solution and sulfuric acid solution was 6 Å, 36 Å and 110 Å, respectively. These results demonstrated the viability of ACL deposited by PECVD from C₆H₁₂ at 550 °C for application as the dry etch hard mask in fabrication of semiconductor devices.     

Interface-modified unipolar resistive random access memory (RRAM) structure for low-power application

An interface-engineered resistive random access memory (RRAM) using bilayer transition metal oxide (TMO) is presented for improving unipolar resistive-switching characteristics. The experiment and simulation data show that better resistive switching characteristics and superb uniformity can be realized by inserting a thin AIOx insertion layer between the Ir/NiO interface. To elucidate the uniformity improvement of our bilayer structure, the conducting-defect effects in the resistive cell were also investigated using a random circuit breaker (RCB) simulation model. It has been verified that the forming and set characteristics are more effectively improved because the conducting-defect ratio in the insertion layer region is low, therefore making it more advantageous for a filament path controllability. Using the optimal oxygen contents in both the insertion layer and the resistive cell, it was confirmed that a significant reduction of up to 0.15 mA of the reset current (I(RESET)) is possible compared to the conventional cell. These results indicate that new AI insertion has a large contribution to the reset and forming processes.     

Study of thermal degradation of organic light emitting device structures by X-ray scattering

We report the process of thermal degradation of organic light emitting devices (OLEDs) having multilayered structure of [LiF/tris-(8-hydroxyquinoline) aluminum(Alq₃)/N,N′-Bis(naphthalen-1-yl)-N,N′-bis(phenyl)benzidine (NPB)/copper phthalocyanine (CuPc)/indium tin oxide (ITO)/SiO₂ on a glass] by synchrotron X-ray scattering. The results show that the thermally induced degradation process of OLED multilayers has undergone several evolutions due to thermal expansion of NPB, intermixing between NPB, Alq₃, and LiF layers, dewetting of NPB on CuPc, and crystallization of NPB and Alq₃ depending on the annealing temperature. The crystallization of NPB appears at 180 °C, much higher temperature than the glass transition temperature (T_g = 96 °C) of NPB. The results are also compared with the findings from the atomic force microscope (AFM) images.     

E‐Band Wideband MMIC Receiver Using 0.1 µm GaAs pHEMT Process

In this paper, the implementations of a 0.1 µm gallium arsenide (GaAs) pseudomorphic high electron mobility transistor process for a low noise amplifier (LNA), a subharmonically pumped (SHP) mixer, and a single‐chip receiver for 70/80 GHz point‐to‐point communications are presented. To obtain high‐gain performance and good flatness for a 15 GHz (71 GHz to 86 GHz) wideband LNA, a five‐stage input/output port transmission line matching method is used. To decrease the package loss and cost, 2nd and 4th SHP mixers were designed. From the measured results, the five‐stage LNA shows a gain of 23 dB and a noise figure of 4.5 dB. The 2nd and 4th SHP mixers show conversion losses of 12 dB and 17 dB and input P1dB of –1.5 dBm to 1.5 dBm. Finally, a single‐chip receiver based on the 4th SHP mixer shows a gain of 6 dB, a noise figure of 6 dB, and an input P1dB of –21 dBm.     

Scheduling for information gathering on sensor network

We investigate a unique wireless sensor network scheduling problem in which all nodes in a cluster send exactly one packet to a designated sink node in an effort to minimize transmission time. However, node transmissions must be sufficiently isolated either in time or in space to avoid collisions. The problem is formulated and solved via graph representation. We prove that an optimal transmission schedule can be obtained efficiently through a pipeline-like schedule when the underlying topology is either line or tree. The minimum time required for a line or tree topology with nodes is . We further prove that our scheduling problem is NP-hard for general graphs. We propose a heuristic algorithm for general graphs. Our heuristic tries to schedule as many independent segments as possible to increase the degree of parallel transmissions. This algorithm is compared to an RTS/CTS based distributed algorithm. Preliminary simulated results indicate that our heuristic algorithm outperforms the RTS/CTS based distributed algorithm (up to 30%) and exhibits stable behavior.

A 0.24-/spl mu/m 2.0-V 1T1MTJ 16-kb nonvolatile magnetoresistance RAM with self-reference sensing scheme

A nonvolatile 16-kb one-transistor one-magnetic-tunnel-junction (1T1MTJ) magnetoresistance random access memory with 0.24-/spl mu/m design rules was developed by using a self-reference sensing scheme for reliable sensing margin. This self-reference sensing scheme was achieved by first storing a voltage of the magnetic tunnel junction (MTJ), and then after a time interval storing a reference voltage of the same MTJ (self-reference). The effects of variation in tunneling oxide thickness can be eliminated by this self-reference sensing scheme. As a result, reliable sensing of MRAM devices with MTJ resistance of 2.5-11 k/spl Omega/ was achieved.     

Numerical study on thermo-stamping of woven fabric composites based on double-dome stretch forming

Through the international corporative benchmark works, the material characterization of the woven fabric composites has been examined to better understand their mechanical properties and to provide the process design information for numerical analysis. As the second stage of the benchmark work, the double-dome geometry has been used to illustrate the effect of numerical schemes on the forming behaviors of the woven composites parts. To account for the change of fiber orientation under the large deformation, the non-orthogonal constitutive model was utilized and nonlinear friction behavior was incorporated in the simulation. The equivalent material properties based on the contact status were used for the thermo-stamping process. Furthermore, we incorporated a recently developed non-orthogonal model which captures the dependency of shear behavior of woven fabric composites on the tensions in yarns. Simulation results showed the effect of coupling on the predicted forming behavior for the double-dome parts. As numerical results, blank draw-in, punch force history and fiber orientation after forming have been compared based on various numerical models and methods.     

Initial biocompatibility and enhanced osteoblast response of Si doping in a porous BCP bone graft substitute

Granular shape biphasic calcium phosphate (BCP) bone grafts with and without doping of silicon cations were evaluated in regards to biocompatibility and MG-63 cellular response. To do this we studied Cellular cytotoxicity, cellular adhesion and spreading behavior and cellular differentiation with alizarin red S staining. Gene expression in MG-63 cells on the implanted bone substitutes was also examined at different time points using RT-PCR. In comparison, the Si-doped BCP granule showed more cellular viability than the BCP granule without doping in MTT assay. Moreover, cell proliferation was much higher when Si doping was employed. The cells grown on the silicon-doped BCP substitutes had more active filopodial growth with cytoplasmic webbing that proceeded to the flattening stage, which was indicative of well cellular adhesion. When these cells were exposed to Si-doped BCP granules for 14 days, well differentiated MG-63 cells were observed. Osteonectin and osteopontin genes were highly expressed in the late stage of differentiation (14 days), whereas collagen type I mRNA were found to be highly expressed during the early stage (day 3). These combined results of this study demonstrate that silicon-doped BCP enhanced osteoblast attachment/spreading, proliferation, differentiation and gene expression.     

Digital Audio Effect System‐on‐a‐Chip Based on Embedded DSP Core

This paper describes the implementation of a digital audio effect system‐on‐a‐chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co‐design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 μm CMOS process and evaluated successfully on a real‐time test board.