The structure and management of service level agreements innetworks

The paper proposes a structure for quality-of-service (QoS)-centered service level agreements (SLA), and a framework for their real-time management in multiservice packet networks. The SLA is structured to be fair to both parties, the service provider and their customer. The SLA considered here are for QoS assured delivery of aggregate bandwidth from ingress to egress nodes; however, the control and signaling is for the more granular flows or calls. A SLA monitoring scheme is presented in which revenue is generated by the admission of flows into the network, and penalty incurred when flows are lost in periods when the service provider is not SLA compliant. In the SLA management scheme proposed, the results of a prior off-line design are used, in conjunction with measurements taken locally at ingress nodes, to classify the loading status of routes. The routing and resource management are based on virtual partitioning and its supporting mechanism of bandwidth protection. The effectiveness of SLA management is measured by the robustness in performance in the presence of substantial diversity in actual traffic conditions. A simulation testbed called D'ARTAGNAN has been built from which we report numerical results for a case study. The results show that the SLA management scheme is robust, fair and efficient over a broad range of traffic conditions     

C-t analysis of MOS capacitors under constant current stress

The effect of high oxide field stress is studied using capacitance-time (C-t) measurements of MOS capacitors. The stress results in parallel shifts of the C-t curve along the time axis. The flatband voltage shift ΔV_FB obtained from the initial deep depletion capacitance C(t=0⁺) follows the same trend as that from the high-frequency C-V characteristics. However, the discrepancy between the two flatband voltages becomes larger as the stress increases due to the effect of interface charges on C-t characteristics. The flatband voltage difference is converted to interface trap density, showing a steady increase of interface trap density with stress, similar to that from low-frequency C-V measurements     

A fully soft-switched extended-period quasi-resonantpower-factor-correction circuit

This paper presents the design criteria, procedure, and implementation of a soft-switched power-factor-correction (PFC) circuit based on the extended-period quasi-resonant (EPQR) principles. All power electronic devices including switches and diodes in the circuit are fully soft switched. The design method is demonstrated in a prototype circuit. The operating principles are confirmed with computer simulation and experimental results. A comparison of the EP-QR operation and zero-voltage-transition (ZVT) pulse-width modulation (PWM) method     

Application of neural networks and machine learning in networkdesign

Communication network design is becoming increasingly complex, involving making networks more usable, affordable, and reliable. To help with this, we have proposed an expert network designer (END) for configuring, modeling, simulating, and evaluating large structured computer networks, employing artificial intelligence, knowledge representation, and network simulation tools. We present a neural network/knowledge acquisition machine-learning approach to improve the END's efficiency in solving the network design problem and to extend its scope to acquire new networking technologies, learn new network design techniques, and update the specifications of existing technologies     

A new lateral MOS-gated thyristor with controlling base-current

A new lateral MOS-gated thyristor, called the Base-Current-Controlled Thyristor, is described. This device is designed so that most holes at the on-stage reach the P base through the floating P⁺ region adjacent to the P base and the on-state MOSFET. At the turn-off stage, the interruption of the hole current to the P base due to switching off the above MOSFET occurs simultaneously with the conventional turn-off operation. The concept of this device is verified experimentally by using the fabricated lateral device with the external MOSFET. This device exhibits a better trade-off relation between the on-state voltage and the turn-off time compared uith the conventional MOS-gated thyristor     

Series equivalence/operation of current-controlled boost-typesingle-phase voltage source converters for bidirectional power flow

Single-phase voltage source power converters (VSCs) under consideration are AC-DC current-controlled boost-type power converters with bidirectional power-handling capability. Equivalence between two series-connected two-level power converters and a single three-level power converter is considered here. Further considered is the series operation of three-level power converters. Simulation results and experimental verification for both are provided. Economical configurations of three-level power converters leading to multilevel waveforms are presented thereafter     

A wafer level monitoring method for plasma-charging damage usingantenna PMOSFET test structure

A novel monitoring method for plasma-charging damage is proposed. This method performs a quick and accurate evaluation using antenna PMOSFET. It was found that not only hot-carrier (HC) lifetime but transistor parameters such as initial gate current and substrate current were changed according to the degree of plasma-charging damage. However, the present work suggests that monitoring the shift of drain current after a few seconds of HC stress is a more accurate method to indicate plasma-charging damage. The monitoring method using the present test structure is demonstrated to be useful for realizing highly reliable devices