Transient behavior of subthreshold characteristics of fullydepleted SOI MOSFETs

It has been found that the subthreshold currents of fully depleted silicon-on-insulator (SOI) MOSFETs show a transient behavior under certain front-gate and back-gate voltage conditions. The cause of this anomaly is explained, and applications for the phenomenon are pointed out. Particularly, a simple way to measure the silicon film thickness is suggested     

层状催化剂颗粒的优化设计——双组分等温平行反应体系

针对双组分等温平行反应体系,分析讨论了以提高催化剂活性和选择性为目标时催化剂活性组分的最优分布形式(为δ-函数分布),并给出了确定这种反应体系的催化剂的最佳活性层位置的计算方法。结果表明:以提高选择性为目标的最佳活性层位置比以提高活性为目标的要更靠近催化剂核心,实用的最优位置应介于二者之间。最后,本文还研究了反应动力学级数、本性选择性以及内扩散模数(Thiele 模数)等因素对最佳活性层位置的影响。     

All-optical photonic switches using integrated inverted asymmetricFabry-Perot modulators and heterojunction phototransistors

InGaAs/GaAs(100) multiple-quantum-well-based inverted cavity asymmetric Fabry-Perot modulators are vertically integrated with GaAs/AlGaAs heterojunction phototransistors to yield all-optical photonic switches. The photonic switches using `normally on' modulator pixels exhibit an output on-off ratio of 12:1 with internal optical gain of 4 dB. The photonic switches using `normally off' modulator pixels yield similar contrast and gain, but exhibit intrinsic bistable behavior. The inverted cavity modulators employed permit utilizing the transparency of the GaAs substrate at the operating wavelength and offer advantages for fabricating large arrays for optical signal processing     

Gate and drain currents in off-state buried-type p-channel LDDMOSFETs

The buried-type p-channel LDD MOSFETs biased at high positive gate voltage exhibit novel characteristics: (1) the ratio of the drain to gate currents is about 1×10^-3 to 5×10^-3; and (2) the gate and drain currents both are functions of only the gate voltage minus the n-well bias. Such characteristics are addressed based on the formation of the surface n ⁺ inversion layer due to the punchthrough of the buried channel to the underlying shallow p-n junction. The measured gate current is due to the Fowler-Nordheim tunneling of electrons from this inversion layer surface and the holes generated within the high-field oxide constitute the drain current. The n⁺ inversion layer surface potential is found to be equal to the n-well bias plus 0.55 V. As a result, both the oxide field and the gate and drain currents are independent of drain voltage     

The prospects of non-volatile phase-change RAM

Phase-change read-and-write memory (PRAM) is a promising memory that can solve the problems of conventional memory—scalability, read/write speed, and reliability. We will review the opportunities and technical challenges of PRAM. The most important challenge of PRAM is the reduction of the writing current. Various approaches to reduce the writing current will be reviewed and the prospects of PRAM are discussed.     

Temperature dependence of hydrogenated amorphous silicon thin-film transistors

The temperature dependence characteristics of hydrogenated amorphous silicon thin-film transistors were investigated. The results indicate that as the temperature was increased, the threshold voltage and the field-effect mobility were first increased, and then decreased, which may be controlled by different mechanisms at low and high temperatures. In addition, if the temperature was higher than 420 K, the Fermi level was promoted to the degenerate-like states, the current channel always existed due to the temperature effect, and the threshold voltage became negative.