Spatially Separated CdS Shells Exposed with Reduction Surfaces for Enhancing Photocatalytic Hydrogen Evolution

To the photocatalytic H₂ evolution, the exposure of a reduction surface over a catalyst plays an important role for the reduction of hydrogen protons. Here, this study demonstrates the design of a noble‐metal‐free spatially separated photocatalytic system exposed with reduction surfaces (MnO_x @CdS/CoP) for highly solar‐light‐driven H₂ evolution activity. CoP and MnO_x nanoparticles are employed as the electron and hole collectors, which are selectively anchored on the outer and inner surface of CdS shells, respectively. Under solar light irradiation, the photogenerated holes and electrons can directionally move to the MnO_x and CoP, respectively, leading to the exposure of a reduction surface. As a result, the H₂ evolution increases from 32.0 to 238.4 µmol h^?1, which is even higher than the activity of platinum‐loaded photocatalyst (MnO_x @CdS/Pt). Compared to the pure CdS with serious photocorrosion, the MnO_x @CdS/CoP maintains a changeless activity for the H₂ evolution and rhodamine B degradation, even after four cycles. The research provides a new strategy for the preparation of spatially separated photocatalysts with a selective reduction surface.     

改进型ZigBee协议在避雷器在线监测系统中的应用研究

本文介绍了一种金属氧化物避雷器(MOA)在线监测系统硬件结构,包括MOA检测终端、电压汇集采样装置和同步通信控制器.在此基础上设计了基于ZigBee无线通信协议的避雷器监测系统.采用星型网络结构,以同步通信控制器为协调器,以MOA检测终端、电压汇集装置为终端节点,详细分析了协调器和节点的工作流程和组网方式.     

微波印制电路板加工工艺探索

本文主要结合当下微波通讯技术的迅猛发展——微波通讯设备日趋模块化、小型化、高密度化,简要阐述了微波印制电路板及其制作优势和缺点,如基材选用多样化、设计与制造的高精度化等.就微波印制电路板加工工艺,分别从选材、对生产环境适应性的要求、合理选用工艺流程、工程材料的处理和下料、钻孔和导通孔接地、图形转移、蚀刻与涂镀以及成型等方面进行了详细探讨.     

激光熔覆镍基和钴基自熔合金的研究

本文采用镍基、钴基自熔合金通过激光熔覆获得性能优良的合金覆层,改善了叶片的耐磨性、耐蚀性,达到了提高使用寿命达10倍以上的目的。     

电子束聚焦偏转系统中透镜加工误差效应的数值计算

本文讨论了由于电磁透镜中电极和极靴加工的误差(孔径椭圆度和端面倾斜)造成电子束系统电子光学性质影响的数值计算问题,包括用有限元法计算具有孔径椭圆度和端面倾斜的透镜中电磁场的分布,电子轨迹方程和像差积分式等。最后给出了用所编制的计算机程序计算的若干个加工误差效应的实例。     

光纤预制棒(MCVD法)的工艺理论研究

本文对光纤预制棒(MCVD)的工艺机理进行了理论分析,建立了沉积过程中的微粒沉降模型,该模型的基本原理与实验观察一致。对渐变型折射率分布多模光纤的结构分析表明,MCVD法能精确地控制a参数和数值孔径,为提高沉积速率和生产效率开辟了应用途径。     

Dielectric Properties in the Microwave Range of K<Subscript>0.5</Subscript>Na<Subscript>0.5</Subscript>NbO<Subscript>3</Subscript> Ceramics

Dielectric properties of a potassium sodium niobate (KNN) system in the microwave range up to GHz have rarely been studied. Since K_0.5Na_0.5NbO₃ is the most common and typical type of KNN materials, non-doped K_0.5Na_0.5 NbO₃ ceramics were synthesized at different temperatures (1080°C, 1090°C, 1100°C, and 1110°C) by a traditional solid reaction method for further characterization and analysis. The ceramics were in perovskite phase with orthorhombic symmetry. A small quantity of second phase was found in the 1110°C sintered specimen, which resulted from the volatilization of alkali oxides as the temperature increased. The complex permittivity was measured for the first time in the microwave range (8.2–12.4 GHz) and in the temperature range from 100°C to 220°C, and the effects of annealing on the dielectric properties were studied. The results indicate that the complex permittivity of KNN ceramics over the microwave range increases mainly due to high bulk density and the additional dielectric contributions of oxygen vacancies at high temperature.     

Novel high PSRR high-order temperature-compensated subthreshold MOS bandgap reference

Novel high power supply rejection ratio (PSRR) high-order temperature-compensated subthreshold metal-oxide-semiconductor (MOS) bandgap reference (BGR) is proposed in Semiconductor Manufacturing International Corporation (SMIC) 0.13 μm complementary MOS (CMOS) process. By adopting subthreshold MOS field-effect transistors (MOSFETs) and the piecewise-curvature temperature-compensated technique, the output reference voltage's temperature performance of the subthreshold MOS BGR is effectively improved. The subthreshold MOS BGR achieves high PSRR performance by adopting the technique of pre-regulator. Simulation results show that the temperature coefficient (TC) of the subthreshold MOS BGR is 1.38×10^?6/°C when temperature is changed from ?40 °C to 125 °C with a power supply voltage of 1.2 V. The subthreshold MOS BGR achieves the PSRR of ?104.54 dB, ?104.54 dB, ?104.5 dB, ?101.82 dB and ?79.92 dB at 10 Hz, 100 Hz, 1 kHz, 10 kHz and 100 kHz respectively.     

10Gb/s突发模式时钟数据恢复电路设计

突发模式的时钟数据恢复是10G EPON系统的关键技术之一。本文介绍了一种基于XNOR/XOR门的振荡器,分析了其工作原理与性能,以此为基础设计了半速率突发时钟恢复电路。设计采用SMIC 0.13?m CMOS工艺进行了流片验证,芯片面积为675?m ? 625?m。测试结果表明,该电路可以即时的实现10Gbit/s的突发数据恢复,恢复出的时钟数据符合IEEE 802.3av标准,锁定时间小于5bit。