Vibrational Energy Transport in Hybrid Ordered/Disordered Nanocomposites: Hybridization and Avoided Crossings of Localized and Delocalized Modes

Vibrational energy transport in disordered media is of fundamental importance to several fields spanning from sustainable energy to biomedicine to thermal management. This work investigates hybrid ordered/disordered nanocomposites that consist of crystalline membranes decorated by regularly patterned disordered regions formed by ion beam irradiation. The presence of the disordered regions results in reduced thermal conductivity, rendering these systems of interest for use as nanostructured thermoelectrics and thermal device components, yet their vibrational properties are not well understood. Here, the mechanism of vibrational transport and the reason underlying the observed reduction is established in detail. The hybrid systems are found to exhibit glass‐crystal duality in vibrational transport. Lattice dynamics reveals substantial hybridization between the localized and delocalized modes, which induces avoided crossings and harmonic broadening in the dispersion. Allen/Feldman theory shows that the hybridization and avoided crossings are the dominant drivers of the reduction. Anharmonic scattering is also enhanced in the patterned nanocomposites, further contributing to the reduction. The systems exhibit features reminiscent of both nanophononic materials and locally resonant nanophononic metamaterials, but operate in a manner distinct to both. These findings indicate that such “patterned disorder” can be a promising strategy to tailor vibrational transport through hybrid nanostructures.     

Physical modeling of temperature dependences of SOI CMOS devicesand circuits including self-heating

To simulate and examine temperature and self-heating effects in Silicon-On-Insulator (SOI) devices and circuits, a physical temperature-dependence model is implemented into the SOISPICE fully depleted (FD) and nonfully depleted (NFD) SOI MOSFET models. Due to the physical nature of the device models, the temperature-dependence modeling, which enables a device self-heating option as well, is straightforward and requires no new parameters. The modeling is verified by DC and transient measurements of scaled test devices, and in the process physical insight on floating-body effects in temperature is attained. The utility of the modeling is exemplified with a study of the temperature and self-heating effects in an SOI CMOS NAND ring oscillator. SOISPICE transient simulations of the circuit, with floating and tied bodies, reveal how speed and power depend on ambient temperature, and they predict no significant dynamic self-heating, irrespective of the ambient temperature     

LMS adaptive filters using distributed arithmetic for high throughput

We present a new hardware adaptive filter architecture for very high throughput LMS adaptive filters using distributed arithmetic (DA). DA uses bit-serial operations and look-up tables (LUTs) to implement high throughput filters that use only about one cycle per bit of resolution regardless of filter length. However, building adaptive DA filters requires recalculating the LUTs for each adaptation which can negate any performance advantages of DA filtering. By using an auxiliary LUT with special addressing, the efficiency and throughput of DA adaptive filters can be of the same order as fixed DA filters. In this paper, we discuss a new hardware adaptive filter structure for very high throughput LMS adaptive filters. We describe the development of DA adaptive filters and show that practical implementations of DA adaptive filters have very high throughput relative to multiply and accumulate architectures. We also show that DA adaptive filters have a potential area and power consumption advantage over digital signal processing microprocessor architectures.     

Metal gate-HfO/sub 2/ MOS structures on GaAs substrate with and without Si interlayer

In this letter, we studied the effects of post-deposition anneal (PDA) time and Si interface control layer (ICL) on the electrical characteristics of the MOS capacitor with high-/spl kappa/ (HfO/sub 2/) material on GaAs. Thin equivalent oxide thickness (EOT<3 nm) with excellent capacitance-voltage (C-V) characteristics has been obtained. The thickness of the Si ICL and PDA time were correlated with C-V characteristics. It was found that high temperature Si ICL deposition and longer PDA time at 600/spl deg/C improved the C-V shape, leakage current, and especially frequency dispersion (<5%).     

G-band (140-220-GHz) InP-based HBT amplifiers

We report tuned amplifiers designed for the 140-220-GHz frequency band. The amplifiers were designed in a transferred-substrate InP-based heterojunction bipolar transistor technology that enables efficient scaling of the parasitic collector-base junction capacitance. A single-stage amplifier exhibited 6.3-dB small-signal gain at 175 GHz. Three-stage amplifiers were subsequently fabricated with one design demonstrating 12.0-dB gain at 170 GHz and a second design exhibiting 8.5-dB gain at 195 GHz.     

A novel approach to characterization of progressive breakdown in high-k/metal gate stacks

Dielectric breakdown (BD) of nFETs with TiN metal gates and HfO₂/interfacial layer with 1.09 nm EOT is studied. Occurrence of progressive BD at low current levels is demonstrated. A new measurement methodology for extraction of the PBD time and its dependence on gate voltage are reported.