Comparing VVR-M reactor fuel assembly heat technological capabilities

Translated from Atomnaya Énergiya, Vol. 67, No. 2, pp. 97–100, August, 1989.     

Synthesis and characterisation of copolyesters from poly(ethylene terephthalate) and poly(hexamethylene terephthalate)

Copolyesters containing poly(ethylene terephthalate) and poly(hexamethylene terephthalate) (PHT) were prepared by a melt condensation reaction. The copolymers were characterised by infrared spectroscopy and intrinsic viscosity measurements. The density of the copolyesters decreased with increasing percentage of PHT segments in the backbone. Glass transition temperatures (T_g). melting points (T_m) and crystallisation temperatures (T_c) were determined by differential scanning calorimetry. An increase in the percentage of PHT resulted in decrease in T_g, T_m and T_c. The as-prepared copolyesters were crystalline in nature and no exotherm indicative of cold crystallisation was observed. The relative thermal stability of the polymers was evaluated by dynamic thermogravimetry in a nitrogen atmosphere. An increase in percentage of PHT resulted in a decrease in initial decomposition temperature. The rate of crystallisation of the copolymers was studied by small angle light scattering. An increase in percentage of PHT resulted in an increase in the rate of crystallisation.     

Half-bridge inverter using 4H-SiC gate turn-off thyristors

This paper reports on the first demonstration of a half-bridge power inverter constructed from silicon carbide gate turn-off thyristors (GTOs) operated in the conventional GTO mode. This circuit was characterized with input bus voltages of up to 600 VDC and 2 A (peak current density of 540 A/cm²) with resistive loads using a pulse-width modulated switching frequency of 2 kHz. We discuss the implications of the thyristor's electrical characteristics and the circuit topology on the overall operation of the half-bridge circuit. This work has determined the conservative critical rate of rise value of the off-state voltage to be 200 V/μs in these devices     

Three-phase flash and distillation

A mixed K-value model allows existing computer programs for the simulation of vapor-liquid equilibrium stages to be used for three-phase vapor-liquid-liquid systems. The mixed K-value model has been implemented with a minimum effort into the Badger General Material Balance flow-sheeting program. Good convergence has been obtained with the mixed K-value model for a number of systems. A comparison is made with published literature [1, 2], showing excellent results with this generally applicable and easy-to-use method.     

Low-Power VLSI Implementation of the Inner Receiver for OFDM-Based WLAN Systems

In this paper, we propose low-power designs for the synchronizer and channel estimator units of the Inner Receiver in wireless local area network systems. The objective of the work is the optimization, with respect to power, area, and latency, of both the signal processing algorithms themselves and their implementation. Novel circuit design strategies have been employed to realize optimal hardware and power efficient architectures for the fast Fourier transform, arc tangent computation unit, numerically controlled oscillator, and the decimation filters. The use of multiple clock domains and clock gating reduces the power consumption further. These blocks have been integrated into an experimental digital baseband processor for the IEEE 802.11a standard implemented in the 0.25mum- 5-metal layer BiCMOS technology from Institute for High Performance Microelectronics.     

Diagnosis and Consulting for Control Network Performance Engineering of CSMA-Based Networks

Network performance engineering can verify the design and dimensioning of large-scale control networks like CSMA-based building automation networks. It combines performance analysis with diagnosis methods to evaluate the network utilization and to detect design errors before installation and can therewith save the expenses of overdimensioning and redesign. This paper will develop a diagnosis model based on fault trees that is able to use the huge amount of performance analysis results to identify design errors and analyze their coherences. This enables not only a fast tracing back of fault causes and the derivation of solutions; it can also visualize the fault coherence to the user and help him to understand his design. Additional consulting tools implement best practice strategies, to support the user in parameterization.