Creating Effective Nanoreactors on Carbon Nanotubes with Mechanochemical Treatments for High‐Areal‐Capacity Sulfur Cathodes and Lithium Anodes

Li‐S batteries can potentially deliver high energy density and power, but polysulfide shuttle and lithium dendrite formations on Li metal anode have been the major hurdle. The polysulfide shuttle becomes severe particularly when the areal loading of the active material (sulfur) is increased to deliver the high energy density and the charge/discharge current density is raised to deliver high power. This study reports a novel mechanochemical method to create trenches on the surface of carbon nanotubes (CNTs) in free‐standing 3D porous CNT sponges. Unique spiral trenches are created by pressures during the chemical treatment process, providing polysulfide‐philic surfaces for cathode and lithiophilic surfaces for anode. The Li‐S cells made from manufacturing‐friendly sulfur‐sandwiched cathodes and lithium‐infused anodes using the mechanochemically treated electrodes exhibit a strikingly high areal capacity as high as 13.3 mAh cm^?2, which is only marginally reduced even with a tenfold increase in current density (16 mA cm^?2), demonstrating both high “cell‐level” energy density and power. The outstanding performance can be attributed to the significantly improved reaction kinetics and lowered overpotentials coming from the reduced interfacial resistance and charge transfer resistance at both cathodes and anodes. The trench–wall CNT sponge simultaneously tackles the most critical problems on both the cathodes and anodes of Li‐S batteries, and this method can be utilized in designing new electrode materials for energy storage and beyond.     

Short packet communication in underlay cognitive network assisted by an intelligent reflecting surface

We propose short packet communication in an underlay cognitive radio network assisted by an intelligent reflecting surface (IRS) composed of multiple reconfigurable reflectors. This scheme, called the IRS protocol, operates in only one time slot (TS) using the IRS. The IRS adjusts its phases to give zero received cumulative phase at the secondary destination, thereby enhancing the end-to-end signal-to-noise ratio. The transmitting power of the secondary source is optimized to simultaneously satisfy the multi-interference constraints, hardware limitations, and performance improvement. Simulation and analysis results of the average block error rates (BLERs) show that the performance can be enhanced by installing more reconfigurable reflectors, increasing the blocklength, lowering the number of required primary receivers, or sending fewer information bits. Moreover, the proposed IRS protocol always outperforms underlay relaying protocols using two TSs for data transmission, and achieves the best average BLER at identical transmission distances between the secondary source and secondary destination. The theoretical analyses are confirmed by Monte Carlo simulations.     

An Integration of Source and Jammer for a Decode-and-Forward Two-way Scheme Under Physical Layer Security

In this paper, we propose and analyze the integration of source and jammer for a decode-and-forward two-way scheme under physical layer security where the source nodes not only transmit data signals, but also transmit jamming signals to degrade the quality of eavesdropping links, and a selected relay forwards the combined data signals using an XOR operation. In this proposed protocol, the best relay is chosen by the maximum end-to-end achievable secrecy rate, and the secrecy system performance is evaluated by the exact and asymptotic secrecy outage probability over flat and block Rayleigh fading channels. The Monte-Carlo results are presented to verify the theoretical analysis.     

Simultaneous Static Testing of A/D and D/A Converters Using a Built‐in Structure

Static testing of analog‐to‐digital (A/D) and digital‐to‐analog (D/A) converters becomes more difficult when they are embedded in a system on chip. Built‐in self‐test (BIST) reduces the need for external support for testing. This paper proposes a new static BIST structure for testing both A/D and D/A converters. By sharing test circuitry, the proposed BIST reduces the hardware overhead. Furthermore, test time can also be reduced using the simultaneous test strategy of the proposed BIST. The proposed method can be applied in various A/D and D/A converter resolutions and analog signal swing ranges. Simulation results are presented to validate the proposed method by showing how linearity errors are detected in different situations.     

Conductive adhesive with transient liquid‐phase sintering technology for high‐power device applications

A highly reliable conductive adhesive obtained by transient liquid‐phase sintering (TLPS) technologies is studied for use in high‐power device packaging. TLPS involves the low‐temperature reaction of a low‐melting metal or alloy with a high‐melting metal or alloy to form a reacted metal matrix. For a TLPS material (consisting of Ag‐coated Cu, a Sn96.5‐Ag3.0‐Cu0.5 solder, and a volatile fluxing resin) used herein, the melting temperature of the metal matrix exceeds the bonding temperature. After bonding of the TLPS material, a unique melting peak of TLPS is observed at 356 °C, consistent with the transient behavior of Ag₃Sn + Cu₆Sn₅ → liquid + Cu₃Sn reported by the National Institute of Standards and Technology. The TLPS material shows superior thermal conductivity as compared with other commercially available Ag pastes under the same specimen preparation conditions. In conclusion, the TLPS material can be a promising candidate for a highly reliable conductive adhesive in power device packaging because remelting of the SAC305 solder, which is widely used in conventional power modules, is not observed.     

High‐Performance Micro‐Solid Oxide Fuel Cells Fabricated on Nanoporous Anodic Aluminum Oxide Templates

Micro‐solid oxide fuel cells (μ‐SOFCs) are fabricated on nanoporous anodic aluminum oxide (AAO) templates with a cell structure composed of a 600‐nm‐thick AAO free‐standing membrane embedded on a Si substrate, sputter‐deposited Pt electrodes (cathode and anode) and an yttria‐stabilized zirconia (YSZ) electrolyte deposited by pulsed laser deposition (PLD). Initially, the open circuit voltages (OCVs) of the AAO‐supported μ‐SOFCs are in the range of 0.05 V to 0.78 V, which is much lower than the ideal value, depending on the average pore size of the AAO template and the thickness of the YSZ electrolyte. Transmission electron microscopy (TEM) analysis reveals the formation of pinholes in the electrolyte layer that originate from the porous nature of the underlying AAO membrane. In order to clog these pinholes, a 20‐nm thick Al₂O₃ layer is deposited by atomic layer deposition (ALD) on top of the 300‐nm thick YSZ layer and another 600‐nm thick YSZ layer is deposited after removing the top intermittent Al₂O₃ layer. Fuel cell devices fabricated in this way manifest OCVs of 1.02 V, and a maximum power density of 350 mW cm^?2 at 500 °C.     

A reversible data hiding scheme for VQ indices using locally adaptive coding

Data hiding is designed to solve the problem of secure information exchange through public networks such as Internet. In this paper, we present an improved reversible data hiding scheme that can recover original VQ indices after data extraction. As with Chang et al.’s scheme, our proposed scheme also depends on the locally adaptive coding scheme. However, experimental results confirm that the hiding capacity of our proposed scheme is around 1.36 bpi in most digital images, which is typically higher than that of Chang et al.’s [17]. Moreover, the average compression rate that can be achieved with our proposed scheme is 0.49 bpp, which outperforms both Lin and Chang’s scheme (0.50 bpp), Tsai (0.50 bpp), Chang et al.’s scheme (0.53 bpp), and Yang and Lin’s scheme (0.53 bpp).     

HV‐SoP Technology for Maskless Fine‐Pitch Bumping Process

Recently, we have witnessed the gradual miniaturization of electronic devices. In miniaturized devices, flip‐chip bonding has become a necessity over other bonding methods. For the electrical connections in miniaturized devices, fine‐pitch solder bumping has been widely studied. In this study, high‐volume solder‐on‐pad (HV‐SoP) technology was developed using a novel maskless printing method. For the new SoP process, we used a special material called a solder bump maker (SBM). Using an SBM, which consists of resin and solder powder, uniform bumps can easily be made without a mask. To optimize the height of solder bumps, various conditions such as the mask design, oxygen concentration, and processing method are controlled. In this study, a double printing method, which is a modification of a general single printing method, is suggested. The average, maximum, and minimum obtained heights of solder bumps are 28.3 μm, 31.7 μm, and 26.3 μm, respectively. It is expected that the HV‐SoP process will reduce the costs for solder bumping and will be used for electrical interconnections in fine‐pitch flip‐chip bonding.     

Wearable Force Touch Sensor Array Using a Flexible and Transparent Electrode

Transparent electrodes have been widely used for various electronics and optoelectronics, including flexible ones. Many nanomaterial‐based electrodes, in particular 1D and 2D nanomaterials, have been proposed as next‐generation transparent and flexible electrodes. However, their transparency, conductivity, large‐area uniformity, and sometimes cost are not yet sufficient to replace indium tin oxide (ITO). Furthermore, the conventional ITO is quite rigid and susceptible to mechanical fractures under deformations (e.g., bending, folding). In this study, the authors report new advances in the design, fabrication, and integration of wearable and transparent force touch (touch and pressure) sensors by exploiting the previous efforts in stretchable electronics as well as novel ideas in the transparent and flexible electrode. The optical and mechanical experiment, along with simulation results, exhibit the excellent transparency, conductivity, uniformity, and flexibility of the proposed epoxy‐copper‐ITO (ECI) multilayer electrode. By using this multi‐layered ECI electrode, the authors present a wearable and transparent force touch sensor array, which is multiplexed by Si nanomembrane p‐i‐n junction‐type (PIN) diodes and integrated on the skin‐mounted quantum dot light‐emitting diodes. This novel integrated system is successfully applied as a wearable human–machine interface (HMI) to control a drone wirelessly. These advances in novel material structures and system‐level integration strategies create new opportunities in wearable smart displays.