Low-threshold, highly reliable 630 nm-band AlGaIP visible laserdiodes with AlInP buried waveguide

Low-threshold, highly reliable 630 nm-band AlGaInP visible laser diodes have been developed by employing a low-loss optical waveguide buried in the AlInP layer. A low-threshold current of 19 mA at 25°C is obtained with a cavity length of 310 μm. This current is the lowest value for 630 nm-band AlGaInP visible laser diodes, to our knowledge. Our AlInP-buried laser diodes with a cavity length of 500 μm operated over 7000 h without significant degradation at 60°C and 5 mW     

Mechanical and thermal properties of HVOF sprayed Ni based alloys with carbide

The objective of the present study is to develop multi-functioned coating to the components, which are made of copper with electroplated Ni and are widely used for steel making industry. In this paper, we report the mechanical and thermal properties of Ni based superalloys with carbide sprayed by high velocity oxygen fuel (HVOF), and the detailed effects of sprayed material, spraying conditions, and initial powder structure on these properties. It was found that, among commercial Ni self-fluxing alloys (without fusing treatment), coating with a carbon content of 0.58 mass% had the most preferable properties, with a good balance of the hardness, strength, and thermal shock resistance. The thermal shock resistance depended not only on the strength of the coating but also on the volume contraction when tested at high temperatures. For the several developed Ni based superalloys with carbide, Ni20Cr8Mo5Fe–WC and Ni16Cr15Mo3–WC demonstrated the prominent adhesion strength and thermal shock resistance with high Galvanic corrosion resistance through optimized spraying condition. Also, 20 mass% NiCr–Cr₃C₂ coating sprayed by using employed relatively small primary particle succeeded in achieving the multi-superior properties; high adhesion strength, high corrosion resistance and thermal shock resistance.     

Self-healing algorithm for logical mesh connection on ring networks

A self-healing algorithm is proposed for a ring network connected as a logical mesh. It offers good performance in terms of protection line capacity, restoration time, and survivability against multiple failures     

A load dispatch method using fractional programming and semidefinite programming

This paper describes a load dispatch method which minimizes power cost—[fuel cost]/[electric output]—for a power system with thermal plants and energy storage facilities. The proposed method employs fractional programming to convert a minimization problem with fractional objective function to a series of quadratic minimization problems, and semidefinite programming to solve converted problems. The method provides the optimum time‐dependent power output/input and storage level of energy storage facilities as well as time‐dependent power output of thermal plants. The method has been applied to a power system with five thermal plants, two energy storage facilities of various performances, and five load demands. The optimum load scheme of four time mesh points is obtained for the thermal plants and energy storage facilities. The fractional programming successfully converges the optimal scheme through a few iterations. The semidefinite programming deals with a variable matrix of 164 dimensions, and 185 inequality constraints. © 2001 Scripta Technica, Electr Eng Jpn, 138(2): 49–58, 2002     

A semi-static complementary gain cell technology for sub-1 V supplyDRAM's

A new semi-static complementary gain cell for future low power DRAM's has been proposed and experimentally demonstrated. This gain cell consists of a write-transistor and its opposite conduction type read-transistor with a heating gate as a storage node which causes a shift in the threshold voltage. This gain cell provides a two orders of magnitude larger cell signal output and higher immunity to noise on the bitlines when compared with a conventional one-transistor DRAM cell without increasing the storage capacitance even at a supply voltage of 0.8 V. The 0.87 μm² cell size is achieved by using a 0.25 μm design rule with a polysilicon thin-film transistor built in the trench and phase shifted i-line lithography     

Metallized ultra-shallow-junction device technology for sub-0.1μm gate MOSFET's

This paper describes a new ultra-thin SOI-CMOS structure offering reduced parasitic diffusion-layer resistance. It addresses ways to deal with the ultra-shallow junctions required by sub-0.1 μm MOSFET's. Based on a CVD tungsten process we experimentally investigate the characteristics of selectively grown tungsten used in the source and drain region made in SOI layers of various thicknesses ranging from 10 to 100 nm. We also investigate certain CMOS device characteristics. The SOI-CMOS structure, with low parasitic diffusion-layer resistance and good contact characteristics for ultra-shallow junction devices exhibits superior device performance and high scalability