Ba-eu (barium-europium)

Several thermodynamic models for calculating binary phase diagrams published in the literature have been reevaluated. Problems in some of these models are already evident in the models themselves and may also be seen in the resulting calculated phase diagrams. When a calculation is attempted, thermodynamic models with quite different formulations may result in very similar proposed phase diagrams. In such cases, if experimental data of a binary phase diagram can be represented reasonably well by several different thermodynamic models, a simpler model often provides the clearest insight into the basic properties of the system. If a calculated phase diagram results in unusual phase relationships, the adopted thermodynamic model may be inappropriate or may involve unrealistic parameters. If the thermodynamic model is clearly unrealistic and yet the calculated phase diagram appears to be normal, errors in calculation or in interpretation may be suspect. Various examples of unlikely combinations of thermodynamic models and phase diagrams are discussed.     

Pu-Zr (plutonium-zirconium)

Journal of Phase Equilibria -     

Two‐way multi‐view 2‐D/3‐D display combining LC lens and HVxDP panel using novel pixel arrangement

We have developed a two‐way multi‐view 2‐D/3‐D display combining a liquid crystal lens and horizontally and vertically x times‐density pixels (HVxDP) arrangement. The two‐way multi‐view display features the same display resolution in 2‐D and 3‐D modes and a quite small color moiré for landscape and portrait, respectively, when using the HVxDP arrangement. In this paper, we realized suitable 3‐D properties for achieving a good balance between 3‐D moiré and 3‐D crosstalk for landscape and portrait by a two‐way liquid crystal lens with two kinds of focal lengths for the edge part and the center part of the lens.     

Parallelized fusion visualization system

The speed-up of supercomputers has increased the complexity of simulations. To analyze such kind of data, we believe that new types of visualization software are needed. Therefore, we have been developing a visualization system called “Fusion Visualization”, and the progresses were reported in the AROB 18th and 19th International Symposiums. We introduced the overall concept at the AROB 18th International Symposium, and then demonstrated a sample of flow visualization in a blood vessel in the AROB 19th International Symposium. To extend our system to enable the handling of larger data, we have implemented the proposed system on a parallelized visualization system; AVS/Express PCE (Parallel Cluster Edition). This paper describes the implementation and the benchmark results.     

Relationship between crystallinity and device characteristics of In‐Sn‐Zn oxide

We have reported that the transistors having the c‐axis‐aligned crystalline (CAAC) In‐Ga‐Zn oxide (IGZO) show good performance. Recently, In‐Sn‐Zn Oxide (ITZO) has attracted much attention because of its high electron mobility, as well as IGZO. However, it has been reported that ITZO field effect transistors (FET) tend to have positive Vth (normally‐on characteristics) and poor reliability compared with IGZO‐FETs. We have reported that high‐performance and high‐reliability OS‐FETs can be fabricated by using CAAC‐IGZO, which has high crystallinity and has no clear grain boundaries, as an active layer. Therefore, we have fabricated CAAC‐ITZO thin films to improve performance of ITZO‐FETs by using CAAC‐ITZO as an active layer. In addition, FETs employing CAAC‐ITZO have better characteristics and reliability than FETs using nano‐crystal ITZO. Furthermore, constant photocurrent method (CPM) measurement was carried out in order to estimate density of deep‐level defect states caused by oxygen vacancies in oxide semiconductors. The results show that CAAC‐ITZO has lower density of deep‐level defect states than nano‐crystal ITZO. We attribute the improvement in reliability of ITZO‐FETs to a decrease in deep‐level defect states of an ITZO active layer, as is the case with IGZO.     

An architecture framework for an adaptive extensible processor

To improve the performance of embedded processors, an effective technique is collapsing critical computation subgraphs as application-specific instruction set extensions and executing them on custom functional units. The problem with this approach is the immense cost and the long times required to design a new processor for each application. As a solution to this issue, we propose an adaptive extensible processor in which custom instructions (CIs) are generated and added after chip-fabrication. To support this feature, custom functional units are replaced by a reconfigurable matrix of functional units (FUs). A systematic quantitative approach is used for determining the appropriate structure of the reconfigurable functional unit (RFU). We also introduce an integrated framework for generating mappable CIs on the RFU. Using this architecture, performance is improved by up to 1.33, with an average improvement of 1.16, compared to a 4-issue in-order RISC processor. By partitioning the configuration memory, detecting similar/subset CIs and merging small CIs, the size of the configuration memory is reduced by 40%.