Adaptive Neural Network for Nuclear Medicine Image Restoration

A novel adaptive neural network is proposed for image restoration using a nuclear medicine gamma camera based on the point spread function of measured system. The objective is to restore image degradation due to photon scattering and collimator photon penetration with the gamma camera and allow improved quantitative external measurements of radionuclides in-vivo. The specific clinical model proposed is the imaging of bremsstrahlung radiation using ³²P and ⁹⁰Y because of the enhanced image degradation effects of photon scattering, photon penetration and poor signal/noise ratio in measurements of this type with the gamma camera. This algorithm model avoids the common inverse problem associated with other image restoration filters such as the Wiener filter. The relative performance of the adaptive NN for image restoration is compared to a previously reported order statistic neural network hybrid (OSNNH) filter by these investigators, a traditional Weiner filter and a modified Hopfield neural network using simulated degraded images with different noise levels. Quantitative metrics such as the change of signal to noise ratio (SNR) are used to compare filter performance. The adaptive NN yields comparable results for image restoration with a slightly better performance for the images with higher noise level as often encountered in bremsstrahlung detection with the gamma camera. Experimental attenuation measurements were also performed in a water tank using two radionuclides, ³²P and ⁹⁰Y, typically used for antibody therapy. Similar values for an effective attenuation coefficient was observed for the restored images using the OSNNH filters and adaptive NN which demonstrate that the restoration filters preserves the total counts in the image as required for quantitative in-vivo measurements. The adaptive NN was computationally more efficient by a factor 4–6 compared to the OSNNH filter. The filter architecture, in turn, is also optimum for parallel processing or VLSI implementation as required for planar and particularly for tomographic mode of detection using the gamma camera. The proposed adaptive NN method should also prove to be useful for quantitative imaging of single photon emitters for other nuclear medicine tomographic imaging applications using positron emitters and direct X-ray photon detection.     

Delay sensing for long-term variations and defects monitoring in safety–critical applications

The impact of parametric variations on digital circuit performance is increasing in nanometer Integrated Circuits (IC), namely of Process, power supply Voltage and Temperature (PVT) variations. Moreover, circuit aging also impacts circuit performance, especially due to Negative Bias Temperature Instability (NBTI) effect. A growing number of physical defects manifest themselves as delay faults (at production, or during product lifetime). On-chip, on-line delay monitoring, as a circuit failure prediction technique, can be an attractive solution to guarantee correct operation in safety–critical applications. Safe operation can be monitored, by predictive delay fault detection. A delay monitoring methodology and a novel delay sensor (to be selectively inserted in key locations in the design and to be activated according to user’s requirements) is proposed, and a 65 nm design is presented. The proposed sensor is programmable, allowing delay monitoring for a wide range of delay values, and has been optimized to exhibit low sensitivity to PVT and aging-induced variations. Two MOSFET models—BPTM and ST—have been used. As abnormal delays can be monitored, regardless of their origin, both parametric variations and physical defects impact on circuit performance can be identified. Simulation results show that the sensor is effective in identifying such abnormal delays, due to NBTI-induced aging and to resistive open defects.     

News: United Kingdom to set air quality emission standards

Government.     

Trapping of soursop (Annona muricata) juice volatiles on porapak Q by suction

The trapping technique of Singleton and Pattee, in which the volatiles are swept to a Porapak Q trap by suction rather than by a sweeping gas, was modified and used to isolate soursop juice volatiles. Using fixed, low vacuum and operating conditions determined specifically for soursop volatiles, very high reproducibility was obtained. The majority of the peaks had a coefficient of variation less than 0.10. The relative amounts of the volatile components obtained by direct headspace sampling was fairly well maintained in the Porapak Q concentrate. The chromatograms showed distinct differences between two commercial brands or between lots of the same brand of soursop juice. The trapping technique appear to have wide applicability provided that the operating conditions are adapted to each product studied.     

A survey on nonlinear analog-to-digital converters

This paper presents a survey on Nonlinear Analog-to-Digital converters (ADC). This class of converters is extremely relevant in applications where there is a need for non-uniform quantization characteristic, for example, some specific applications in the areas of light detection, hearing aid, nuclear physics, image acquisition, communication systems, etc. This survey outlines the state-of-the-art Nonlinear ADC topologies, such as, floating point, logarithmic, piecewise linear and oversampled nonlinear converters, and discusses their performance and advantages in terms of their applications.     

Design and Test of a Certifiable ASIC for a Safety-Critical Gas Burner Control System

The purpose of this paper is to present a methodology and tools for the design and test of an EN298 compliant ASIC chip for a safety-critical gas burner control system. Safe operation, as far as the critical variable is concerned, is guaranteed in the presence of two simultaneous faults. Emphasis is put on circumventing methodology, EDA (Electronic Design Automation) and foundry limitations and on product certification requirements.     

Capacity Optimization in TDMA Ad-Hoc Networks

Many scheduling techniques have been developed to solve the problem of sharing the common channel to multiple stations. TDMA has been increasingly used as a scheduling technique in ad-hoc networks. The current trend for QoS capable applications led to the deployment of numerous routing schemes that use TDMA. These schemes try to solve the problem of distributing the available slots among the wireless nodes and at the same time, to find paths within the network that fulfill some QoS related limitations, such as end-to-end delay. The exact way the slots are distributed among the transmitting nodes has an impact on the end-to-end delay and other performance parameters of the network, such as capacity. Therefore, the efficiency of the scheduling algorithms is closely related to the network topologies. In this paper, we propose two new end-to-end TDMA scheduling algorithms that try to enhance the network capacity by increasing the number of concurrent connections established in the network, without causing additional end-to-end delay. We study the efficiency of the proposed algorithms, when applied on various random topologies, and compare them in terms of end-to-end delay and network capacity.     

Low Cost BIST for Static and Dynamic Testing of ADCs

This paper presents a low cost test method for the static and dynamic characterization of analog-to-digital converters. The method is suitable for implementation in a SoC environment, as a built-in self test (BIST) solution. In the proposed approach, noise is used as the test signal. Theory of operation and practical results demonstrating the effectiveness of the method for INL, DNL, THD and SINAD characterization are presented. The BIST surface overhead caused by the noise generator is only 7.4% of the ADC total area. The reduced number of data samples required allows a reduction of about 7.5× in test time, in comparison to the histogram method.Maria da Gloria Cataldi Flores was born in Santa Maria, Brazil, in 1978. She received the electrical engineering degree in 2000 from Universidade Federal de Santa Maria (UFSM) and the M.S. degree engineering in 2003 from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then, she has been working as a design engineer in an EAS Supply brazilian company. Her main research interests include mixed-signal and analog testing and digital signal processing.Marcelo Negreiros was born in Porto Alegre, Brazil, in 1969. He received the electrical engineering degree in 1992 and the M.S. degree engineering in 1994, both from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. Since then he was been working as an associate researcher in the Signal Processing Lab. (LaPSI) of the Electrical Engineering Department at UFRGS. Since 2000 he also works toward a Ph.D. in Computer Science from UFRGS. His main research interests include mixed-signal and analog testing and digital signal processing.Luigi Carro was born in Porto Alegre, Brazil, in 1962. He received the Electrical Engineering and the M.Sc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1985 and 1989, respectively. From 1989 to 1991 he worked at ST-Microelectronics, Agrate, Italy, in the R&D group. In 1996 he received the Ph.D. degree in the area of Computer Science from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design and Digital Signal processing disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible for courses in Embedded Systems, Digital Signal Processing, and VLSI Design. His primary research interests include mixed-signal design, digital signal processing, mixed-signal and analog testing, and fast system prototyping. He has published more than 90 technical papers in those topics and is the author of the book Digital Systems Design and Prototyping (in portuguese).Altamiro A Susin was born in Vacaria-RS, Brazil, in 1945. He received the Electrical Engineering and the MSc. degrees from Universidade Federal do Rio Grande do Sul (UFRGS), Brazil, in 1972 and 1977, respectively. Since 1968 he worked in the start up of Computer Centers of two local Universities. In 1981 he got his Dr. Eng degree from Institut National Polytechnique de Grenoble-France. He is presently a lecturer at the Electrical Engineering Department of UFRGS, in charge of Digital Systems Design disciplines at the graduate and undergraduate level. He is also a member of the Graduation Program in Computer Science of UFRGS, where he is responsible by courses in VLSI Architecture and is also thesis director. His main research interests are Integrated Circuit Architecture, Embedded Systems, Signal Processing with more than 50 technical papers published in those domains. He is/was responsible for several R&D projects either funded with public and/or industry resources.Felipe Ricardo Clayton received the B.S. degree in Electrical Engineering from State University of Campinas (UNICAMP), Brazil, in 1986. He worked at CPqD (Brazilian PTT R&D Center) till 1996 designing analog and mixed signal circuits for telecom and automotive applications. From 1997 to the second half of 1998, he worked at Instituto Superior Técnico (IST), Lisbon, Portugal, under the guidance of Prof. Carlos Azeredo Leme on development of CMOS RF circuits. Since October 1998 he had worked for Motorola SPS. Now he is head of the Power Managment Group at Freescale.Cristiano Benevento received his B.S. degree in Electrical Engineering from Universidade Estadual de Campinas (Unicamp), Brazil, in 1997. He worked at Motorola Cellular Infrastructure Group until August 2000 as a Systems Engineer. He joined Motorola Semiconductor Product Sector in August 2000 as IC Designer for Power Management Group and is now at Freescale.