Understanding and analysing activity and learning in virtual communities

Abstract  The purpose of this study is to provide a preliminary framework to observe, analyse and evaluate both activity and learning in virtual communities. So various types of virtual communities will be studied by examining their relationship to socialisation and learning. After a presentation of the main ideas of Wenger's social learning theory, the principal components of the social context of the emergence and evolution of virtual communities will be described. It will show how taking this context into account enables the definition of four principal types of virtual communities: community of interest, goal-oriented community of interest, learners' community and community of practice and describe how the activity of these communities develops according to the goals they set for themselves and to the strategies they adopt to reach them. For each type of virtual community, an attempt will be made to determine the process of negotiation of meaning at the base of learning, and to describe the learning performed in terms of participation and reification processes.     

Metallic Conductive Nanowires Elaborated by PVD Metal Deposition on Suspended DNA Bundles

Metallic conductive nanowires (NWs) with DNA bundle core are achieved, thanks to an original process relying on double‐stranded DNA alignment and physical vapor deposition (PVD) metallization steps involving a silicon substrate. First, bundles of DNA are suspended with a repeatable process between 2 µm high parallel electrodes with separating gaps ranging from 800 nm to 2 µm. The process consists in the drop deposition of a DNA lambda‐phage solution on the electrodes followed by a naturally evaporation step. The deposition process is controlled by the DNA concentration within the buffer solution, the drop volume, and the electrode hydrophobicity. The suspended bundles are finally metallized with various thicknesses of titanium and gold by a PVD e‐beam evaporation process. The achieved NWs have a width ranging from a few nanometers up to 100 nm. The electrical behavior of the achieved 60 and 80 nm width metallic NWs is shown to be Ohmic and their intrinsic resistance is estimated according to different geometrical models of the NW section area. For the 80 nm width NWs, a resistance of about few ohms is established, opening exploration fields for applications in microelectronics.     

European research policy and bibliometric indicators, 1990�C2005

This paper describes and analyses the role played in the development of bibliometric indicators??and the use made of bibliometric indicators for policy purposes??by the European Commission??s Directorate-General Research in the period 1990?C2005.     

In-Situ Analyzing the Influence of Thermoelectromagnetic Convection on the Nucleation Ahead of the Advancing Interface During Directional Solidification

Sn-3wt%Pb alloy was directionally solidified without and with a 0.08T transverse magnetic field(TMF),and real-time recorded by in-situ synchrotron X-ray imaging.Results indicate that TMF shortened the distance from the location of nucleation to the advancing interface,and accelerated the growth rate of the equiaxed crystal,which caused the columnar-to-equiaxed transition(CET)finally.The thermoelectromagnetic convection(TEMC)in front of the interface and around the crystal’s dendritic branch should respond to changes of the distance and the growth rate.     

Optimum analytical approach to nonlinear circuit analysis

In this article, an analytical approach, for optimum nonlinear circuit analysis is described. At a given input frequency, the method consists in determining, for each nonlinear component of the circuit, a closed volume including all the allowed powers at its terminal ports. The boundary of this volume, called “characteristic surface,” allows extremum powers of nonlinear devices to be predicted and then optimum performance of the circuit to be deduced. Applied to various microwave transistor circuits, this procedure has shown good agreement between computed and measured or previous published results. © 1996 John Wiley & Sons, Inc.     

Fault-tolerant parallel programming in Argus

Fault tolerance is an issue ignored in most parallel languages. The overhead of making parallel, high-performance programs resilient to processor crashes is often too high, given the low probability of such events. If parallel systems become more large-scaled, however, processor failures will become likely, so they should be dealt with. Two approaches to this problem are feasible. First, the system can make programs fault-tolerant transparently. It can log messages, make checkpoints, and so on. Second, the programmer can write explicit code for handling failures in an application-specific way. The latter approach is potentially more efficient, but also requires more work from the programmer. In this paper, we intend to get some initial insight into how hard and efficient explicit fault-tolerant parallel programming is. We do so by implementing four parallel applications in Argus, a language supporting parallelism as well as fault tolerance. Our experiences indicate that the extra effort needed for fault tolerance varies much between different applications. Also, trade-offs can frequently be made between programming effort and efficiency. One lesson we learned is that fault tolerance should not be added as an afterthought, but is best taken into account from the start. As another result, the ability to integrate transparent and explicit mechanisms for fault tolerance would sometimes be highly useful.