Configurable FFT Processor Using Dynamically Reconfigurable Resource Arrays

This paper presents results of using a Coarse Grain Reconfigurable Architecture called DRRA (Dynamically Reconfigurable Resource Array) for FFT implementations varying in order and degree of parallelism using radix-2 decimation in time (DIT). The DRRA fabric is extended with memory architecture to be able to deal with data-sets much larger than what can be accommodated in the register files of DRRA. The proposed implementation scheme is generic in terms of the number of FFT point, the size of memory and the size of register file in DRRA. Two implementations (DRRA-1 and DRRA-2) have been synthesized in 65 nm technology and energy/delay numbers measured with post-layout annotated gate level simulations. The results are compared to other Coarse Grain Reconfigurable Architectures (CGRAs), and dedicated FFT processors for 1024 and 2048 point FFT. For 1024 point FFT, in terms of FFT operations per unit energy, DRRA-1 and DRRA-2 outperforms all CGRA by at least 2× and is worse than ASIC by 3.45×. However, in terms of energy-delay product DRRA-2 outperforms CGRAs by at least 1.66× and dedicated FFT processors by at least 10.9×. For 2048-point FFT, DRRA-1 and DRRA-2 are 10× better for energy efficiency and 94.84 better for energy-delay product. However, radix-2 implementation is worse by 9.64× and 255× in terms of energy efficiency and energy-delay product when compared against a radix-2⁴ implementation.

     

Edge-Node-Aware Adaptive Data Processing Framework for Smart Grid

Wireless Personal Communications - Smart grid is an autonomous power generation and production system, that includes various energy management sub-systems such as energy efficient resources, smart...     

An Efficient,Scalable Key Transport Scheme (ESKTS) for Delay/Disruption Tolerant Networks

In the past, security protocols including key transport protocols are designed with the assumption that there are two parties communication with each other and an adversary tries to intercept this communication. In Delay/Disruption Tolerant Networking (DTN), packet delivery relies on intermediate parties in the communication path to store and forward the packets. DTN security architecture requires that integrity and authentication should be verified at intermediate nodes as well as at end nodes and confidentiality should be maintained for end communicating parties. This requires new security protocols and key management to be defined for DTN as traditional end-to-end security protocols will not work with DTN. To contribute towards solving this problem, we propose a novel Efficient and Scalable Key Transport Scheme (ESKTS) to transport the symmetric key generated at a DTN node to other communicating body securely using public key cryptography and proxy signatures. It is unique effort to design a key transport protocol in compliance with DTN architecture. ESKTS ensures that integrity and authentication is achieved at hop-by-hop level as well as end-to-end level. It also ensures end-to-end confidentiality and freshness for end communicating parties. This scheme provides a secure symmetric key transport mechanism based on public key cryptography to exploit the unique bundle buffering characteristics of DTN to reduce communication and computation cost .     

Radio Resource Allocation in Multi-User Cooperative Relaying Networks with Resource Block Pairing and Fairness Constraints

In this paper we address the problem of radio resource allocation in cooperative relaying networks. We focus on the resource block and power allocations for the downlink of OFDM-based relaying multi-user network. The resource allocation is investigated for both amplify and forward and decode and forward protocols under the constraints of power, resource block pairing and data rate fairness. To reduce complexity, the optimization problem is solved in two steps. In the first step, resource block pairing and allocation are conducted jointly with equal transmission power for both the base station and the relay. In the second step, transmission power is further optimized to maximize the system throughput. Our analysis is focused on the total achievable system throughput and the achievable individual throughput for each user.     

Fast motion estimation for surveillance video compression

In this article, novel approaches to perform efficient motion estimation specific to surveillance video compression are proposed. These includes (i) selective (ii) tracker-based and (iii) multi-frame-based motion estimation. In selective approach, motion vector search is performed for only those frames that contain some motion activity. In another approach, contrary to performing motion estimation on the encoder side, motion vectors are calculated using information of a surveillance video tracker. This approach is quicker but for some scenarios it degrades the visual perception of the video compared with selective approach. In an effort to speed up multi-frame motion estimation, we propose a fast multiple reference frames-based motion estimation technique for surveillance videos. Experimental evaluation shows that significant reduction in computational complexity can be achieved by applying the proposed strategies.     

On the realization of the current controlled current-mode amplifier using the current controlled conveyor

The current controlled current-mode amplifier proposed by Fabre et al. (1996, IEEE Transactions on Circuits and Systems—I, 43, 82) is reanalysed to show that it can work not only under small signal conditions, as suggested by Fabre et al., but also under large signal conditions. Simulation results which confirm the theory presented are included.     

Application of local error method to SSSF simulation of vector propagation in dispersion compensated optical links

A local error method based on an analytical scheme previously developed for the scalar optical fiber channel is applied to the second-order symmetrized split-step Fourier simulation of polarization multiplexed signal propagation through dispersion compensated optical fiber links. It is found that the global simulation accuracy for the vector propagation can be satisfied using the local error bound from a scalar propagation model for the same global error over a large range of simulation accuracy, chromatic dispersion, and differential group delay. Furthermore, carefully designed numerical simulations are used to show that similar local simulation error are obtained for vector simulations and that the similar local error leads to higher computational efficiency compared to other prevalent step-size selection schemes. The scaling of the global simulation error with respect to the number of optical fiber spans is demonstrated, and global error control for multi-span simulations is proposed. Combining the local error and global error control, the developed simulation scheme can significantly speed up the time-consuming simulations in coherent optical fiber communication system analysis and design.     

An adaptive and efficient buffer management scheme for resource-constrained delay tolerant networks

Provisioning buffer management mechanism is especially crucial in resource-constrained delay tolerant networks (DTNs) as maximum data delivery ratio with minimum overhead is expected in highly congested environments. However, most DTN protocols do not consider resource limitations (e.g., buffer, bandwidth) and hence, results in performance degradation. To strangle and mitigate the impact of frequent buffer overflows, this paper presents an adaptive and efficient buffer management scheme called size-aware drop (SAD) that strives to improve buffer utilization and avoid unnecessary message drops. To improve data delivery ratio, SAD exactly determines the requirement based on differential of newly arrived message(s) and available space. To vacate inevitable space from a congested buffer, SAD strives to avoid redundant message drops and deliberate to pick and discard most appropriate message(s) to minimize overhead. The performance of SAD is validated through extensive simulations in realistic environments (i.e., resource-constrained and congested) with different mobility models (i.e., Random Waypoint and disaster). Simulation results demonstrate the performance supremacy of SAD in terms of delivery probability and overhead ratio besides other metrics when compared to contemporary schemes based on Epidemic (DOA and DLA) and PRoPHET (SHLI and MOFO).     

基于51单片机的节能型光伏追日系统的设计

目前存在的光伏追日系统在控制方式上都存在同样的问题:追日步进电机时刻运行,从未停歇,存在浪费用电和机械疲劳运行等问题。文章主要介绍以51单片机为控制核心,结合光控与时控的优点,并在此基础上提出适时进入节能的睡眠模式,最大程度地减少追日系统能耗的控制方法。实测结果表明,该算法具有减少系统耗电、减少机械传动系统损伤等优点。     

Highly Efficient and Water‐Insensitive Self‐Healing Elastomer for Wet and Underwater Electronics

Integrating self‐healing capabilities into soft electronic devices increases their durability and long‐term reliability. Although some advances have been made, the use of self‐healing electronics in wet and/or (under)water environments has proven to be quite challenging, and has not yet been fully realized. Herein, a new highly water insensitive self‐healing elastomer with high stretchability and mechanical strength that can reach 1100% and ≈6.5 MPa, respectively, is reported. The elastomer exhibits a high (>80%) self‐healing efficiency (after ≈ 24 h) in high humidity and/or different (under)water conditions without the assistance of an external physical and/or chemical triggers. Soft electronic devices made from this elastomer are shown to be highly robust and able to recover their electrical properties after damages in both ambient and aqueous conditions. Moreover, once operated in extreme wet or underwater conditions (e.g., salty sea water), the self‐healing capability leads to the elimination of significant electrical leakage that would be caused by structural damages. This highly efficient self‐healing elastomer can help extend the use of soft electronics outside of the laboratory and allow a wide variety of wet and submarine applications.