Embedded microstrip interconnection lines for gigahertz digitalcircuits

Transmission line structures are needed for the high-performance interconnection lines of GHz integrated circuits (ICs) and multichip modules (MCMs), to minimize undesired electromagnetic wave phenomena and, therefore, to maximize the transmission bandwidth of the interconnection lines. In addition, correct and simple models of the interconnection lines are required for the efficient design and analysis of the circuits containing the interconnection lines. In this paper, we present electrical comparisons of three transmission line structures: conventional metal-insulator-semiconductor (MIS) and the embedded microstrip structures-embedded microstrip (EM) and inverted embedded microstrip (IEM). In addition, we propose closed-form expressions for the embedded microstrip structures EM and IEM and validate the expressions by comparing with empirical results based on S-parameter measurements and subsequent microwave network analysis. Test devices were fabricated using a 1-poly and 3-metal 0.6 μm Si process. The test devices contained the conventional MIS and the two embedded microstrip structures of different sizes. The embedded microstrip structures were shown to carry GHz digital signals with less loss and less dispersion than the conventional MIS line structures. S-parameter measurements of the test devices showed that the embedded microstrip structures could support the quasi-TEM mode propagation at frequencies above 2 GHz. On the other hand, the conventional MIS structure showed slow-wave mode propagation up to 20 GHz. More than 3-dB/mm difference of signal attenuation was observed between the embedded microstrip structures and the conventional MIS structure at 20 GHz. Finally, analytical RLCG transmission line models were developed and shown to agree well with the empirical models deduced from S-parameter measurements     

Progressive NO2 Sensors with Rapid Alarm and Persistent Memory-Type Responses for Wide-Range Sensing Using Antimony Triselenide Nanoflakes

Antimony triselenide (Sb₂Se₃) nanoflake-based nitrogen dioxide (NO₂) sensors exhibit a progressive bifunctional gas-sensing performance, with a rapid alarm for hazardous highly concentrated gases, and an advanced memory-type function for low-concentration (<1 ppm) monitoring repeated under potentially fatal exposure. Rectangular and cuboid shaped Sb₂Se₃ nanoflakes, comprising van der Waals planes with large surface areas and covalent bond planes with small areas, can rapidly detect a wide range of NO₂ gas concentrations from 0.1 to 100 ppm. These Sb₂Se₃ nanoflakes are found to be suitable for physisorption-based gas sensing owing to their anisotropic quasi-2D crystal structure with extremely enlarged van der Waals planes, where they are humidity-insensitive and consequently exhibit an extremely stable baseline current. The Sb₂Se₃ nanoflake sensor exhibits a room-temperature/low-voltage operation, which is noticeable owing to its low energy consumption and rapid response even under a NO₂ gas flow of only 1 ppm. As a result, the Sb₂Se₃ nanoflake sensor is suitable for the development of a rapid alarm system. Furthermore, the persistent gas-sensing conductivity of the sensor with a slow decaying current can enable the development of a progressive memory-type sensor that retains the previous signal under irregular gas injection at low concentrations.     

SET/CMOS hybrid process and multiband filtering circuits

We have developed an integration technology for the single electron transistor (SET)/CMOS hybrid systems. SET and CMOS transistors can be optimized without any possible degradation due to mixing dissimilar devices by adopting just one extra mask step for the separate gate oxidation (SGOX). We have confirmed that discrete devices show ideal characteristics required for the SET/CMOS hybrid systems. An SET shows obvious Coulomb oscillations with a 200-mV period and CMOS transistors show high voltage gain. Based on the hybrid process, new hybrid circuits, called periodic multiband filters, are proposed and successfully implemented. The new filter is designed to perform a filtering operation according to the periodic multiple blocking bands of which a period is originated from the SET. Such a novel function was implemented efficiently with a few transistors by making full use of the periodic nature of SET characteristics.     

The Region 1 & 3 Broadcasting‐Satellite Service Plan after WRC‐03

The 1977 Broadcasting‐Satellite Service (BSS) Plan for Region 1 & 3 had been widely acknowledged to be out‐of‐date by the late 1980s. Development of digital modulation in the early 1990s provided an opportunity to update the technical provisions of the Plan to make it more economically viable. After a decade of work and three World Radiocommunication Conferences (WRCs), the revision of Region 1 & 3 BSS Plan was finally completed in 2003. The new Plan increased channel assignments from 5 to 10 analog‐equivalent channels for each country in Region 1, and from 4 to 12 channels for each country in Region 3. Yet, despite the increase in capacity, the new Plan is surprisingly similar to the original one in terms of the technical parameters. It is still based on national coverage, and the channel plan, orbital location, orbital spacing, and polarization are also the same. As a result, the new Plan is no more economically viable to implement than the old. To create economically viable BSS systems would most likely require modifications to the assignment in the Plan. Yet, modification procedures were made more difficult to apply after replanning. Less future implementation of BSS networks than would otherwise have occurred can be expected, and an inefficient usage of these frequency bands will likely result. On the other hand, less implemented systems will mean more capacity set aside for future use. This is important for countries that currently do not have satellite operations. In the end, BSS replanning reflects the eternal conflict between efficient usage and guaranteed future access. Copyright © 2005 John Wiley & Sons, Ltd.     

Barrier layer effect of tantalum on the electromigration in sputtered copper films on hydrogen silsesguioxane and SiO2

As IC devices scale down to the submicron level, the resistance-capacitance (RC) time delays are the limitation to circuit speed. A solution is to use low dielectric constant materials and low resistivity materials. In this work, the influence of underlying barrier Ta on the electromigration (EM) of Cu on hydrogen silsesquioxane (HSQ) and SiO₂ substrates was investigated. The presence of a Ta barrier not only improves the adhesion between Cu and dielectrics, but also enhances the crystallinity of Cu film and improves the Cu electromigration resistance. The activation energy obtained suggests a grain boundary migration mechanism and the current exponent calculated indicates the Joule heating effect.     

Fiber-optic confocal reflectance microscope with miniature objective for in vivo imaging of human tissues

We have built a fiber-optic confocal reflectance microscope capable of imaging human tissues in near real time. Miniaturization of the objective lens and the mechanical components for positioning and axially scanning the objective enables the device to be used in inner organs of the human body. The lateral resolution is 2 micrometers and axial resolution is 10 micrometers. Confocal images of fixed tissue biopsies and the human lip in vivo have been obtained at 15 frames/s without any fluorescent stains. Both cell morphology and tissue architecture can be appreciated from images obtained with this microscope.     

Fast locking delay-locked loop using initial delay measurement

A delay-locked loop (DLL) architecture capable of incorporating fast locking and low jitter features simultaneously is reported. A test chip was fabricated in a 0.6 μm CMOS process to prove its functionality. The proposed DLL can align the internal clock to the external reference clock within two cycles and maintain its locking state with the aid of feedback operation     

Visual Cryptography Based on an Interferometric Encryption Technique

This paper presents a new method for a visual cryptography scheme that uses phase masks and an interferometer. To encrypt a binary image, we divided it into an arbitrary number of slides and encrypted them using an XOR process with a random key or keys. The phase mask for each encrypted image was fabricated under the proposed phase‐assignment rule. For decryption, phase masks were placed on any path of the Mach‐Zehnder interferometer. Through optical experiments, we confirmed that a secret binary image that was sliced could be recovered by the proposed method.     

A Surface Tailoring Method of Ultrathin Polymer Gate Dielectrics for Organic Transistors: Improved Device Performance and the Thermal Stability Thereof

Tailoring the surface of the dielectric layer is of critical importance to form a good interface with the following channel layer for organic thin film transistors (OTFTs). Here, a simple surface treatment method is applied onto an ultrathin (<15 nm) organosilicon‐based dielectric layer via the initiated chemical vapor deposition (iCVD) to make it compatible with organic semiconductors without degrading its insulating property. A molecular‐thin oxide capping layer is formed on a 15 nm thick poly(1,3,5‐trimetyl‐1,3,5‐trivinyl cyclotrisiloxane) (pV3D3) by a brief oxygen plasma treatment. The capping layer greatly enhances the thermal stability of the dielectrics, without degrading the original mechanical flexibility and insulating performance of the dielectrics. Moreover, the surface silanol functionalities formed by the plasma treatment can also be utilized for the surface modification with silane compounds. The surface‐modified dielectrics are applied to fabricate low‐voltage operating (<5 V) pentacene‐based OTFTs. The highest field‐effect mobility of the device with the surface‐treated 15 nm thick pV3D3 is 0.59 cm² V^?1 s^?1, which is improved up to two times compared to the TFT with the pristine pV3D3. It is believed that the simple surface treatment method can widely extend the applicability of the highly robust, ultrathin, and flexible pV3D3 gate dielectrics to design the surface of the dielectrics to match well various kinds of organic semiconductors.