Development of a Continuous Segmented Flow Tubular Reactor and the “Scale‐out” Concept – In Search of Perfect Powders

The synthesis of powders with controlled shape and narrow particle size distributions is still a major challenge for many industries. A continuous Segmented Flow Tubular Reactor (SFTR) has been developed to overcome homogeneity and scale‐up problems encountered when using batch reactors. Supersaturation is created by mixing the co‐reactants in a micromixer inducing precipitation; the suspension is then segmented into identical micro‐volumes by a non‐miscible fluid and sent through a tube. These micro‐volumes are more homogeneous when compared to large batch reactors leading to narrower size distributions, better particle morphology, polymorph selectivity and stoichiometry. All these features have been demonstrated on single tube SFTR for different chemical systems. To increase productivity for commercial application the SFTR is being “scaled‐out” by multiplying the number of tubes running in parallel instead of scaling‐up by increasing their size. The versatility of the multi‐tube unit will allow changes in type of precipitate with a minimum of new investment as new chemistry can be researched, developed and optimised in a single tube SFTR and then transferred to the multi‐tube unit for powder production.     

Reliability investigation of 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel

The authors have investigated the reliability performance of G-band (183 GHz) monolithic microwave integrated circuit (MMIC) amplifiers fabricated using 0.07-/spl mu/m T-gate InGaAs-InAlAs-InP HEMTs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel on 3-in wafers. Life test was performed at two temperatures (T/sub 1/ = 200 /spl deg/C and T/sub 2/ = 215 /spl deg/C), and the amplifiers were stressed at V/sub ds/ of 1 V and I/sub ds/ of 250 mA/mm in a N/sub 2/ ambient. The activation energy is as high as 1.7 eV, achieving a projected median-time-to-failure (MTTF) /spl ap/ 2 /spl times/ 10/sup 6/ h at a junction temperature of 125 /spl deg/C. MTTF was determined by 2-temperature constant current stress using /spl Delta/G/sub mp/ = -20% as the failure criteria. The difference of reliability performance between 0.07-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with pseudomorphic In/sub 0.75/Ga/sub 0.25/As channel and 0.1-/spl mu/m InGaAs-InAlAs-InP HEMT MMICs with In/sub 0.6/Ga/sub 0.4/As channel is also discussed. The achieved high-reliability result demonstrates a robust 0.07-/spl mu/m pseudomorphic InGaAs-InAlAs-InP HEMT MMICs production technology for G-band applications.     

Hot carrier analysis in low-temperature poly-Si thin-film transistors using pico-second time-resolved emission microscope

We have analyzed degradation of N-channel thin-film-transistor (TFT) under dynamic stress using a pico-second time-resolved emission microscope. We have successfully detected emission at pulse fall edge for the first time. Emission intensity increased with the decrease of pulse fall time. As the degradation depended on the pulse fall time, this dependence clearly illustrates that hot electrons are the dominant cause of the degradation under dynamic stress. Based on these dependences, we proposed a model considering electron traps in the poly-Si.     

Synthesis and Study of Alkaline-Earth Metal Uranoborates,AI I(BUO5)2·nH2O

Previously unknown compounds A^{I I}(BUO₅)₂·nH₂O (A^{I I} = Mg, Ca, Sr, Ba; n = 0-7) were synthesized. Their structure and thermal decomposition were studied by X-ray diffraction, IR spectroscopy, and thermal analysis.     

Improved-performance noncoherent weighted-coefficients diversity combiner for DPSK and NC-FSK signals in nonidentical Nakagami fading channels

It is well-known that noncoherent equal-gain combining (NC-EGC) is the simplest combining technique for noncoherent and differentially coherent communication systems. However, for nonidentical Nakagami-m channels (channels having nonuniform multipath intensity profile (MIP) and/or arbitrary non-integer fading parameters), the use of NC-EGC has three main disadvantages. First, its performance serves as a lossy upper bound to that of the optimum diversity combiner. Second, it results in complicated expressions for the system average error performance. Third, it incurs noncoherent combining loss (does not aid the use of diversity) at relatively low average signal-to-noise ratio (SNR). In this letter, we propose a modified version of the NC-EGC, which is a noncoherent combiner with weighting coefficients, to overcome the disadvantages of the conventional one. We show that this alternative combiner does provide improvements over the conventional N.C-EGC for all values of average SNRs, it does not incur any noncoherent combining loss, and it leads to a design of the receiver whose average error performance can be evaluated easily.     

Reversed Temperature-Dependent Propagation Delay Characteristics in Nanometer CMOS Circuits

The supply voltage to threshold voltage ratio is reduced with each new technology generation. The gate overdrive variation with temperature plays an increasingly important role in determining the speed characteristics of CMOS integrated circuits. The temperature-dependent propagation delay characteristics, as shown in this brief, will experience a complete reversal in the near future. Contrary to the older technology generations, the speed of circuits in a 45-nm CMOS technology is enhanced when the temperature is increased at the nominal supply voltage. Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable operation under temperature fluctuations. A design methodology based on optimizing the supply voltage for temperature-variation-insensitive circuit performance is proposed in this brief. The optimum supply voltage is 45% to 53% lower than the nominal supply voltage in a 180-nm CMOS technology. Alternatively, the optimum supply voltage is 15% to 35% higher than the nominal supply voltage in a 45-nm CMOS technology. The speed and energy tradeoffs in the supply voltage optimization technique are also presented     

Electrical and photoelectric properties of electrochemically fabricated SnO2/Cd0.4Zn0.6S/CdTe solar cells

Solar cells based on SnO₂/Cd_0.4Zn_0.6S/CdTe heterostructures are fabricated by electrochemical deposition, and the dependences of their electrical and photoelectric properties on the thermal annealing conditions are studied. It is shown that thermal annealing reduces the tunnel currents by almost two orders of magnitude. The best conditions of thermal annealing are determined (t = 300°C and τ = 9 min). These conditions provide the highest photosensitivity of the heterostructures under study (I _sc ≈ 21.2 mA/cm², U _oc ≈ 813 mV, and η = 14.7%).     

High Rate Data Synchronization in GALS SoCs

Globally asynchronous, locally synchronous (GALS) systems-on-chip (SoCs) may be prone to synchronization failures if the delay of their locally-generated clock tree is not considered. This paper presents an in-depth analysis of the problem and proposes a novel solution. The problem is analyzed considering the magnitude of clock tree delays, the cycle times of the GALS module, and the complexity of the asynchronous interface controllers using a timed signal transition graph (STG) approach. In some cases, the problem can be solved by extracting all the delays and verifying whether the system is susceptible to metastability. In other cases, when high data bandwidth is not required, matched-delay asynchronous ports may be employed. A novel architecture for synchronizing inter-modular communications in GALS, based on locally delayed latching (LDL), is described. LDL synchronization does not require pausable clocking, is insensitive to clock tree delays, and supports high data rates. It replaces complex global timing constraints with simpler localized ones. Three different LDL ports are presented. The risk of metastability in the synchronizer is analyzed in a technology-independent manner     

Equivalent electrical network of the DNA molecule

The variation of current density with bias or temperature is examined for DNA molecules of different configuration. To this end, the DNA molecule is represented as an equivalent electrical network whose behavior is then simulated with PSPICE. The results are found to be in close agreement with ones obtained within a physical model. It is established that the electrical response of a DNA molecule to an applied electric field depends on the boundary conditions and the potential profile along the molecule. This finding should contribute to the creation of a complete library of DNA-molecule configurations with prescribed electrical properties.     

All-optical seed pulse extraction for packet synchronization based on self-induced effects in a vertical-cavity semiconductor gate

Self-induced effects in a passive polarization-independent vertical-cavity semiconductor gate are investigated numerically and experimentally. We demonstrate all-optical seed-pulse extraction for synchronization of differential phase-shift keying and ON-OFF keying packets at 10 Gb/s. Our results provide evidence that vertical-cavity gates, exploiting saturable absorption in semiconductor quantum-wells, exhibit attractive performances in terms of efficiency, power consumption, and polarization independency.