系统模块(SiP)和三维封装(3D)在移动通讯中的应用

电子封装业界正遭受着前所未有的来自手机和其他移动通讯终端设备挑战。在这一领域里,IC封装的关键是尺寸微型化,缩减成本和市场时机。这一挑战的背后隐含着手机技术发展的两大趋势:系统模块化和日益增长的复杂性及功能。越来越多的功能正在被组合到手机上即PDA、MP3、照相机、互联网等等。功能的增加需要靠模块化来实现,而模块化又促进了更多功能的组合。同时,模块化使得移动通讯终端设备得以微型化、降低成本和缩短设计周期。业界越来越多地感受到整体射频模块和通讯模块解决方案的必要性。这些整体模块把手机设计师从电路设计的细节中解脱出来,从而能专著于高层的手机应用和系统的设计。为了满足上诉移动通讯产品的苛刻要求,大量的新兴电子封装技术和封装产品应运而生。最引人注目的例子在于对系统模块穴SiP雪和三维穴3D雪封装的重点资金和技术投入。这两项先进封装技术有着各自不同的特征和应用范围。总体介绍先进封装技术在移动通讯中的应用,重点讨论电子封装材料和工艺所面临的挑战和最新发展趋势。对移动通讯带来的新一轮集成化及其所产生的潜在供应链问题也做了适当的讨论。     

A real-time digital VCR encode/decode and MPEG-2 decode LSIimplemented on a dual-issue RISC processor

A real-time system large-scale-integrated circuit (LSI) for digital video cassette recorder (DVCR) encoding/decoding and MPEG-2 decoding is implemented on a dual-issue RISC processor (DRISC) with dedicated hardware optimized for video-block processing. The DRISC achieves 972-MOPS software performance and can execute fixed-length data processing at the block level as well as processing at the macro-block level and above for the DVCR/MPEG-2. The dedicated hardware for variable-length coding/decoding can encode and decode codes for both the DVCR and the MPEG-2 by changing translation tables. The dedicated hardware for video-block loading can process video-block data transfers with half-pel operations. The LSI size is 7.7×7.2 mm² in a 0.25-μm CMOS process     

Gold Nanoparticle and Gold Nanorod Embedded PEDOT:PSS Thin Films as Organic Thermoelectric Materials

We report the thermoelectric properties of organic–inorganic hybrid thin films composed of conductive polymer, poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS), and inorganic gold nanomaterials. Two kinds of material with different shapes, namely rod-shaped gold nanorods (AuNRs) and spherical gold nanoparticles (AuNPs), were used in this study. The PEDOT:PSS/AuNR hybrid films showed an enhancement in electrical conductivity (σ ≈ 2000 S cm^?1) and concurrently a decrease in the Seebeck coefficient (S ≈ 12 μV K^?1) with increase in the AuNR concentration. This behavior indicates the presence of the hybrid effect of AuNR on the thermoelectric properties. From scanning electron microscopy (SEM) observation of the highly concentrated PEDOT:PSS/AuNR hybrid films, the formation of a percolated structure of AuNRs was confirmed, which probably contributed to the large enhancement in σ. For the highly concentrated PEDOT:PSS/AuNP films, a dense distribution of AuNPs in the film was also observed, but this did not lead to a major change in the σ value, probably due to the less conductive connections between NPs. This suggests that one-dimensional particles with larger aspect ratio (rods and wires) are favorable nanocomponents for development of highly conductive hybrid materials.     

Structural study of degraded ZnMgSSe blue light emitters

Using electroluminescence (EL) topography and transmission electron microscopy (TEM), we investigated the nonluminescent regions which form while current is being injected into ZnMgSSe/ZnSSe/ZnCdSe-based blue light emitters. Small dark spots were observed just after turn-on and spread out forming rough nonluminescent triangles in the <100> directions in the EL image of the active region. TEM studies showed that the small dark spots are pre-existing stacking faults originating at the substrate/epitaxial layer interface. The nonluminescent triangles were found to be a dense region of dislocation dipoles and dislocation loops. Each dipole was aligned along two <110> directions in the {111} planes. The Burgers vectors were of the type a/2<011> inclined at 45° to the (001) junction plane.     

Systolic array implementation of block LMS algorithm

The authors derive the systolic array implementation of the block LMS algorithm, consisting of N processing elements, where N is the filter order. The resulting array attains an order-independent sampling rate. Computer simulation results show that the block LMS algorithm is faster than the delayed LMS algorithm, which has previously been implemented on systolic arrays     

A 286 mm2 256 Mb DRAM with ×32 both-ends DQ

This paper describes a 256 Mb DRAM chip architecture which provides up to ×32 wide organization. In order to minimize the die size, three new techniques: an exchangeable hierarchical data line structure, an irregular sense amp layout, and a split address bus with local redrive scheme in the both-ends DQ were introduced. A chip has been developed based on the architecture with 0.25 μm CMOS technology. The chip measures 13.25 mm×21.55 mm, which is the smallest 256 Mb DRAM ever reported. A row address strobe (RAS) access time of 26 ns was obtained under 2.8 V power supply and 85°C. In addition, a 100 MHz×32 page mode operation, namely 400 M byte/s data rate, in the standard extended data output (EDO) cycle has been successfully demonstrated     

CW Operation of a Submillimeter Wave Gyrotron (Gyrotron Fu IV) for High Stability of the Output Frequency

The first cw operation of our submillimeter wave gyrotron (Gyrotron FU IV) using a 12 T superconducting magnet has been successfully carried out. Output power is more than 20 W at a frequency of 301 GHz in the TE₀₃₁ resonant cavity mode. Time-resolved frequency measurement s shows that the frequency fluctuation of the gyrotron output is smaller than 2 MHz. This frequency fluctuation is mainly due to the fluctuation in the output voltage of the power supply.     

Electrical properties of nickel in silicon

Electrical activity and energy levels as well as diffusion properties of nickel in silicon have not yet been reliably established. In this paper, we investigated the diffusion and the electrical properties of nickel in silicon to confirm that nickel is electrically active and introduces one acceptor and one donor level by combined measurements of Hall coefficient and DLTS, and measurements of the distribution of electrically active nickel in various silicon diodes by DLTS. The former experiments show that bothn- andp- type silicon are compensated by nickel and that nickel introduces an acceptor level ofE _c-0.47 ± 0.04 eV and a donor level ofE _v +0.18 ± 0.02 eV. The concentrations of these two levels are almost identical over the diffusion temperatures from about 800 to 1100° C, indicating that these donor and acceptor levels are due to different charge states of the same nickel center. In the distribution measurements of electrically active nickel in silicon diodes, we inspected how nickel can be observed by DLTS. It was found that the nickel diffusion intop- n junction is rather complicated, the distribution profiles of nickel in the vicinity of thep- n junction being markedly influenced by an additional heating at elevated temperatures after the nickel diffusion. This gives evidence that the difference in silicon devices used in various studies could give rise to different results.     

Increase in photovoltaic performances of dye-sensitized solar cells—Modification of interface between TiO2 nano-porous layers and F-doped SnO2 layers

In order to improve the physical and chemical contacts between a porous TiO₂ layer and an F-doped SnO₂ transparent conductive layer (FTO), the surface of the FTO layer is polished. After polishing, the surface roughness decreased. However, light transmittance and sheet resistance did not vary largely. The short circuit current (J_sc) and efficiencies increased after the FTO was polished. It was found that the interfacial charge transfer between a TiO₂ layer and an FTO layer decreased by impedance measurement, which suggests that contacts between an FTO and a TiO₂ layer are improved because of the flatted surfaces or removal of electrical impurities. We propose one of the industrially important phenomena that surface polishing of FTO is one of the ways to increase photovoltaic performances for DSCs.     

First On-Wafer Power Characterization of MMIC Amplifiers at Sub-Millimeter Wave Frequencies

We present on-wafer power measurements of 35 nm gate length InP HEMT amplifiers at 330 GHz. Various amplifiers are examined. The maximum output power of 1.78 mW is measured from a three stage amplifier. Additional output power may be possible but limited by our input power source level to saturate amplifiers. This result is the highest frequency on-wafer power measurement we are aware of reported to date, and demonstrates the technique we utilize to be a fast method of evaluating power performance of submillimeter wave amplifiers without the need to package devices.