Interactive plant simulation modeling for developing an operator training system in a natural gas pressure-regulating station

This study proposes a method of interactive plant simulation modeling which delivers the online simulated results to the field operators and induces them to take proper actions in the case of pre-identified accident scenarios in a chemical plant. The developed model integrates the real-time process dynamic simulation with 3DCFD accident simulation in a designed interface using object linking and embedding technology so that it can convey to trainees the online information of the accident which is not available in existing operator training systems. The model encompasses the whole process of data transfer till the end of the training at which a trainee operates an emergency shutdown system in a programmed model. In this work, an overall scenario is simulated which is from an abnormal increase in the main valve discharge (second) pressure due to valve malfunction to accidental gas release through the crack of a pressure recorder, and the magnitude of the accident with respect to the lead time of each trainee’s emergency response is analyzed. The model can improve the effectiveness of the operator training system through interactively linking the trainee actions with the simulation model resulting in different accident scenarios with respect to each trainee’s competence when facing an accident.     

水包油乳液型复合泥饼清除剂的室内研究

针对裂缝性致密砂岩储层存在的高密度油基钻井液固相颗粒侵入以及泥饼难以清除等问题,开发出一种高效率、抗高温、低成本的水包油型复合泥饼清除剂。复合泥饼清除剂由混合酸、抗高温渗透剂、清洗剂、乳化剂等组成。通过对复合泥饼清除剂——水包油型乳液体系以及新型泥饼清除剂——纳米乳液体系的对比研究分析表明,在洗油方面以及溶蚀泥饼结构方面,复合泥饼清除剂效果优于纳米乳液。该复合泥饼清除剂的稳定性能强,抗温可达120℃;在静态条件下泥饼清除率可以达到90%以上,在动态条件下清除后岩心渗透率恢复值可以达到89%,最佳作业时间为8 h。在目前求降本增效的形势下,该复合泥饼清除剂剂配方简单,性能优良,解堵时间较短,能够有效改善和提高岩心渗透率恢复值。      

金属卤化物气体放电灯启动问题的探讨

本文介绍了分别改变灯内填充物含量即 NaI 和 ScI 含量的方法,探讨此变化与光源气体放电参数的关系,从而分析和研究金属卤化物灯的启动特性,从而寻求延长光源寿命的途径。     

试样薄化导致的Cu－Al贝氏体／马氏体组织变化

加热到１１７３Ｋ的Ｃｕ－２５ａｔ；％Ａｌ合金块状试样经７２３Ｋ６０Ｓ等温淬火后其组织由片状的“羽毛状贝氏体（９Ｒ结构）和β＿１＇马氏体（１８Ｒ结构）组成。当试样被离子束轰去进一步薄化后，在足够薄的区域内生成了许多２Ｈ结构的薄片马氏体。初步分析认为该薄片马氏体形成的原因是由于贝氏体生成时在试样内留下了高的应力场，当试样薄化到一临界厚度以下时，试样区的三维约束条件松弛使试样内的应力场触发了薄片马氏体的生成。这些薄片马氏体是通过位于贝氏体界面上位错的重新启动而长大的。     

钽掺杂的钌基厚膜电阻导电相和玻璃相颗粒尺寸效应的研究

本文报道了钽掺杂钌基厚膜电阻制备过程中导电相和玻璃相颗粒尺寸效应的实验研究结果。当导电相和玻璃相颗粒尺寸分别达到25和50nm时,电阻阻值和电阻温度系数也随之发生显著变化,并尝试根据厚膜电阻导电机理对其产生的原因进行定性的分析。     

A 22-kHz multibit switched-capacitor sigma-delta D/A converter with92 dB dynamic range

A time- and capacitor-multiplexing technique for use in a highly linear switched-capacitor multibit DAC in sigma-delta data converters is presented. The technique uses subintervals in the sample clock to deliver multiple charge packets to holding capacitors. It avoids distortion effects caused by mismatched capacitors and finite opamp gain. A five-level switched-capacitor DAC using the proposed technique was designed as part of an audio-band multibit sigma-delta D/A converter that achieved a dynamic range of 92 dB and a THD of -93 dB with a low oversampling ratio of 32. No trimming, calibration, or dynamic matching scheme was required. The five-level SC DAC has been fabricated in a 2-μm CMOS process, and testing confirmed the anticipated theoretical results     

Diversity reception of 16STAR-QAM in frequency-selective Ricianfading

Bit error rate (BER) performance of differential 16STAR-QAM in frequency-selective Rician fading channels with diversity reception is theoretically analysed for three different types of delay profiles: double spike, one-sided exponential and Gaussian profiles. The effect of time delay between line-of-sight (LOS) and multipath components is also included in the analysis, and is shown to degrade the system performance significantly     

Packaging of a 128 by 128 liquid-crystal-on-silicon spatial lightmodulator using self-pulling soldering

A self-pulling soldering technology has been demonstrated for assembling liquid crystal on silicon (LCOS) spatial light modulators (SLMs). Solder joints with different profiles and sizes are designed to provide vertical surface tension forces to control the gap accommodating the ferroelectric liquid crystal (FLC) layer in the range of a micron with sub-micron uniformity. This technology provides an automatic, batch assembly process for a LCOS SLM through one reflow process. The component designs and process optimization are described, and the first operational results are presented     

An adaptive algorithm for separating and tracking multipledirectional sources in linear arrays

An algorithm for spatially filtering out, enhancing, and tracking individual directional sources in an adaptive array is proposed and investigated. In this algorithm, the sources are separated by using an adaptive beamformer whose outputs are processed by using the LMS algorithm to track distinct sources individually. From the LMS weights used, the source locations can be estimated. Whenever significant changes in these are detected, the beamformer is updated so that its outputs will be due to different sources in the steady state. With this algorithm, the problems of look-direction errors in look-direction constrained arrays and of large signal power in power inversion arrays are eliminated, and the enhancement of multiple moving sources becomes a natural process. Furthermore, because the sources are individually tracked and the beamformer is only updated occasionally, the algorithm possesses fast tracking behavior, and its implementation complexity is comparable to that of beamformer-based adaptive arrays using the LMS algorithm     

Threshold voltage and C-V characteristics of SOIMOSFET's related to Si film thickness variation on SIMOX wafers

C-V characteristics of fully depleted SOI MOSFETs have been studied using a technique for measuring silicon-film thickness using a MOSFET. The technique is based on C-V measurements between the gate and source/drain at two different back-gate voltages, and only a large-area transistor is required. Using this technique, SOI film thickness mapping was made on a finished SIMOX wafer and a thickness variation of ±150 Å was found. This thickness variation causes as much as a 100-mV variation in the device threshold voltage. The silicon-film thickness variation and threshold-voltage variation across a wafer shows a linear correlation dependence for a fully depleted device. C-V measurements of the back-gate device yield the buried-oxide thickness and parasitic capacitances. The effects of GIDL (gate-induced drain leakage) current on C-V characteristics are also discussed