便携设备的电源管理技术展望

2005年对以电池驱动的便携设备的电源管理解决方案来说，将是充满机遇的一年。这些设备的制造商不断在寻求各种可能的方式，以把更多的功能合并到一个已经很紧凑的外壳中，这说明他们将不断需要具有高度集成、最小占位面积、最高运行效率的集成电路解决方案，以延长电池的使用时间。     

Physical Mechanisms behind the Field‐Cycling Behavior of HfO2‐Based Ferroelectric Capacitors

Novel hafnium oxide (HfO₂)‐based ferroelectrics reveal full scalability and complementary metal oxide semiconductor integratability compared to perovskite‐based ferroelectrics that are currently used in nonvolatile ferroelectric random access memories (FeRAMs). Within the lifetime of the device, two main regimes of wake‐up and fatigue can be identified. Up to now, the mechanisms behind these two device stages have not been revealed. Thus, the main scope of this study is an identification of the root cause for the increase of the remnant polarization during the wake‐up phase and subsequent polarization degradation with further cycling. Combining the comprehensive ferroelectric switching current experiments, Preisach density analysis, and transmission electron microscopy (TEM) study with compact and Technology Computer Aided Design (TCAD) modeling, it has been found out that during the wake‐up of the device no new defects are generated but the existing defects redistribute within the device. Furthermore, vacancy diffusion has been identified as the main cause for the phase transformation and consequent increase of the remnant polarization. Utilizing trap density spectroscopy for examining defect evolution with cycling of the device together with modeling of the degradation results in an understanding of the main mechanisms behind the evolution of the ferroelectric response.     

Capacitance DNA bio-chips improved by new probe immobilization strategies

Label-free DNA detection plays a crucial role in developing point-of-care biochips. Capacitance detection is a promising technology for label-free detection. However, data published in literature often show evident time drift, large standard deviation, scattered data points, and poor reproducibility. To address these problems, mercapto-hexanol or similar alkanethiols are usually considered as blocking agents. The aim of the present paper is to investigate new blocking agents to further improve DNA probe surfaces. Data from AFM, SPR, florescence microscopy, and capacitance measurements are used to investigate new lipoate and ethylene-glycol molecules. The new surfaces offer further improvements in terms of diminished detection errors. Film structures are investigated at the nano-scale to justify the detection improvements in terms of probe surface quality. This study demonstrates the superiority of lipoate and ethylene-glycol molecules as blocking candidates when immobilizing molecular probes onto spot surfaces in label-free DNA biochip.     

系统级封装技术及其应用

本文介绍了系统级封装技术及其兴起背景,对比了与SoC的异同。通过分析系统级封装的技术特点,阐述了其优势;分析了系统级封装的成本构成和特点。本文从集成电路产业链整合的观点,分析了国内系统级封装的机遇与挑战;以长电科技为例,介绍了系统级封装在设计、制造上的关键技术与当前的能力,并分析了未来的趋势和挑战。本丈还对当前的系统级封装产品与应用领域做了详细介绍。     

Methods for Compression of Feedback in Adaptive Multi-carrier 4G Schemes

In this paper, several algorithms for compressing the feedback of channel quality information are presented and analyzed. These algorithms are developed for a proposed adaptive modulation scheme for future multi-carrier 4G mobile systems. These strategies compress the feedback data and, used together with opportunistic scheduling, drastically reduce the feedback data rate. Thus the adaptive modulation schemes become more suitable and efficient to be implemented in future mobile systems, increasing data throughput and overall system performance.

Investigation of the fluid/structure interaction phenomenon in IC packaging

In the present study, experiment and simulation studies were conducted on the fluid/structure interaction (FSI) analysis of integrated circuit (IC) packaging. The visualisation of FSI phenomenon in the actual package is difficult due to limitations of package size, available equipment, and the high cost of the experimental setup. However, the experimental data are necessary to validate the simulation results in the FSI analysis of IC packaging. Scaled-up package size was fabricated to emulate the encapsulation of IC packaging and to study the effects of FSI phenomenon in the moulded package. The interaction between the fluid and the structure was observed. The deformation of the imitated chip was studied experimentally. The air-trap mechanism that occurred during the experiment is also presented in this paper. Simulation technique was utilised to validate the experimental result and to describe the physics of FSI. The predicted flow front was validated well by the experiment. Hence, the virtual modelling technique was proven to be excellent in handling this problem. The study also extends FSI modelling in actual-size packaging.     

汽车电子系统要求低静态电流

如今的汽车电子系统越来越复杂。同时，汽车环境对任何电子产品来说都是很大的挑战，因为汽车电子系统要求运行电压很宽，并且有很大的瞬态电压和温度变化。另外，性能要求也越来越高，需要多个供应电压以满足系统的不同要求。典型的     

Large-scale biomedical image analysis in grid environments

This paper presents the application of a component-based Grid middleware system for processing extremely large images obtained from digital microscopy devices. We have developed parallel, out-of-core techniques for different classes of data processing operations employed on images from confocal microscopy scanners. These techniques are combined into a data preprocessing and analysis pipeline using the component-based middleware system. The experimental results show that: 1) our implementation achieves good performance and can handle very large datasets on high-performance Grid nodes, consisting of computation and/or storage clusters and 2) it can take advantage of Grid nodes connected over high-bandwidth wide-area networks by combining task and data parallelism.     

A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM

In this paper we propose a novel built-in self-test (BIST) design for embedded SRAM cores. Our contribution includes a compact and efficient BIST circuit with diagnosis support and an automatic diagnostic system. The diagnosis module of our BIST circuit can capture the error syndromes as well as fault locations for the purposes of repair and fault/failure analysis. In addition, our design provides programmability for custom March algorithms with lower hardware cost. The combination of the on-line programming mode and diagnostic system dramatically reduces the effort in design debugging and yield enhancement. We have designed and implemented test chips with our BIST design. Experimental results show that the area overhead of the proposed BIST design is only 2.4% for a 128 KB SRAM, and 0.65% for a 2 MB one.