MRI-compatible intensity-modulated force sensor for cardiac catheterization procedures

This paper presents a novel, magnetic resonance imaging (MRI)-compatible, force sensor suitable for cardiac catheterization procedures. The miniature, fiber-optic sensor is integrated with the tip of a catheter to allow the detection of interaction forces with the cardiac walls. The optical fiber light intensity is modulated when a force acting at the catheter tip deforms an elastic element, which, in turn, varies the distance between a reflector and the optical fiber. The tip sensor has an external diameter of 9 Fr (3?mm) and can be used during cardiac catheterization procedures. The sensor is able to measure forces in the range of 0-0.85?N, with relatively small hysteresis. A nonlinear method for calibration is used and real-time MRI in vivo experiments are carried out, to prove the feasibility of this low-cost sensor, enabling the detection of catheter-tip contact forces under dynamic conditions.     

Mobile Cloud Computing: A Survey,State of Art and Future Directions

In the recent years, cloud computing frameworks such as Amazon Web Services, Google AppEngine and Windows Azure have become increasingly popular among IT organizations and developers. Simultaneously, we have seen a phenomenal increase in the usage and deployment of smartphone platforms and applications worldwide. This paper discusses the current state of the art in the merger of these two popular technologies, that we refer to as Mobile Cloud Computing (MCC). We illustrate the applicability of MCC in various domains including mobile learning, commerce, health/wellness and social medias. We further identify research gaps covering critical aspects of how MCC can be realized and effectively utilized at scale. These include improved resource allocation in the MCC environment through efficient task distribution and offloading, security and privacy.     

An improved cluster formation process in wireless sensor network to decrease energy consumption

Wireless sensor network has special features and many applications, which have attracted attention of many scientists. High energy consumption of these networks, as a drawback, can be reduced by a hierarchical routing algorithm. The proposed algorithm is based on the Low Energy Adaptive Clustering Hierarchy (LEACH) and Quadrant Cluster based LEACH (Q-LEACH) protocols. To reduce energy consumption and provide a more appropriate coverage, the network was divided into several regions and clusters were formed within each region. In selecting the cluster head (CH) in each round, the amount of residual energy and the distance from the center of each node were calculated by the base station (including the location and residual energy of each node) for all living nodes in each region. In this regard, the node with the largest value had the highest priority to be selected as the CH in each network region. The base station calculates the CH due to the lack of energy constraints and is also responsible for informing it throughout the network, which reduces the load consumption and tasks of nodes in the network. The information transfer steps in this protocol are similar to the LEACH protocol stages. To better evaluate the results, the proposed method was implemented with LEACH LEACH-SWDN, and Q-LEACH protocols using MATLAB software. The results showed better performance of the proposed method in network lifetime, first node death time, and the last node death time.

     

Flexible Prime‐Field Genus 2 Hyperelliptic Curve Cryptography Processor with Low Power Consumption and Uniform Power Draw

This paper presents an energy‐efficient (low power) prime‐field hyperelliptic curve cryptography (HECC) processor with uniform power draw. The HECC processor performs divisor scalar multiplication on the Jacobian of genus 2 hyperelliptic curves defined over prime fields for arbitrary field and curve parameters. It supports the most frequent case of divisor doubling and addition. The optimized implementation, which is synthesized in a 0.13 μm standard CMOS technology, performs an 81‐bit divisor multiplication in 503 ms consuming only 6.55 μJ of energy (average power consumption is 12.76 μW). In addition, we present a technique to make the power consumption of the HECC processor more uniform and lower the peaks of its power consumption.     

Security and Privacy Analysis of Song–Mitchell RFID Authentication Protocol

Many applications, such as e-passport, e-health, credit cards, and personal devices that utilize Radio frequency Identification (RFID) devices for authentication require strict security and privacy. However, RFID tags suffer from some inherent weaknesses due to restricted hardware capabilities and are vulnerable to eavesdropping, interception, or modification. The synchronization and untraceability characteristics are the major determinants of RFID authentication protocols. They are strongly related to privacy of tags and availability, respectively. In this paper, we analyze a new lightweight RFID authentication protocol, Song and Mitchell, in terms of privacy and security. We prove that not only is the scheme vulnerable to desynchronization attack, but it suffers from traceability and backward traceability as well. Finally, our improved scheme is proposed which can prevent aforementioned attacks.     

A fault-tolerant and congestion-aware architecture for wireless networks-on-chip

Wireless Networks - The combination of traditional wired links for regular transmissions and express wireless paths for long distance communications is a promising solution to prevent multi-hop...     

Optimal rate allocation in successively structured Gaussian CEO problem

We consider the Chief Executive Officer (CEO) problem in which agents encode their observations without collaborating with each other and send through rate constrained noiseless channels to a fusion center (FC).We apply the successive coding strategy into this problem and determine the closed-form expressions for optimal rates in order to achieve the minimum distortion under a sum-rate constraint. We show that the optimal sum-rate distortion performance for the Gaussian CEO problem is achievable using the successive coding strategy which is inherently a low complexity approach of obtaining a prescribed distortion. We also determine the optimal rate allocation region for the successively structured Gaussian CEO problem.     

Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic

Differential Cascode Voltage Switch (DCVS) is a well-known logic style, which constructs robust and reliable circuits. Two main strategies are studied in this paper to form static DCVS-based standard ternary fundamental logic components in digital electronics. While one of the strategies leads to fewer transistors, the other one has higher noise margin. New designs are simulated with HSPICE and 32 nm CNTFET technology at various realistic conditions such as different power supplies, load capacitors, frequencies, and temperatures. Simulations results demonstrate their robustness and efficiency even in the presence of PVT variations. In addition, new noise injection circuits for ternary logic are also presented to perform noise immunity analysis.     

High-Performance Mixed-Mode Universal Min-Max Circuits for Nanotechnology

In this paper a low-power, high-speed and high-resolution voltage-mode Min-Max circuit, as well as a new efficient universal structure for determining the minimum and maximum values of the input digital signals, is proposed for nanotechnology. In addition, the proposed designs provide rail-to-rail input and output signals which enhance the performance and the robustness of the circuits. The advantage of the proposed Min-Max circuit is that it is extendable for any arbitrary n-digit and radix-r input numbers. Comprehensive simulation results at CMOS and CNFET technologies demonstrate the low-power and high-performance operation as well as insusceptibility to PVT variations of the proposed structure.