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31.
Ferroelastic (90°) domain wall motion occurs readily in bulk samples of displacive ferroelectrics such as Pb(Zr,Ti)O3 (PZT), dictating critical piezoelectric, dielectric, and polarization switching properties. Many prior studies have used converse piezoelectric measurements to probe the dynamics of ferroelastic domains in thin films; however, such experiments are strongly influenced by the mechanical clamping effect of the substrate, which inhibits electric field‐induced 90° domain wall motion. Nevertheless, these observations raise a tantalizing question: Does the application of mechanical stress, rather than electric field, result in an entirely different response in thin films? Here we report biaxial stress‐driven crystallographic reorientation of (100)/(001) textured, 70 nm thick Pb(Zr0.25Ti0.75)O3 films via 90° domain wall motion, measured in situ by both x‐ray diffraction and piezoforce microscopy. Visual evidence of nanoscale mechanisms that underlie the direct piezoelectric effect is shown. Mobile 90° domain walls effect complete orientation switching in the grains in which they operate, without apparent wall pinning, indicating that bulk‐like ferroelastic behavior can extend to nanocrystalline films in the absence of substrate clamping.  相似文献   
32.
This paper provides a historical perspective on thedevelopment of analogue sampled-data signal processing circuitsand systems. The evolution, role and current trends in the developmentof analogue sampled-data signal processing systems is surveyed.Firstly, the evolution of integrated circuit based techniques,culminating in the ubiquitous switched-capacitor technique istraced. Then the role that analogue sampled-data systems playwithin the context of a general information processing environmentis examined and the required characteristics are identified.Trends in silicon integrated circuit processing technology aresummarised and their impact on sampled analogue circuits areidentified. Finally, the application of analogue current-modetechniques, and in particular switched-currents, to overcomesome of the limitations of previous voltage based approaches,is discussed.  相似文献   
33.
Despite the great advances in the theory and applications of fractional calculus, some topics remain unclear, making a systematic use difficult. In this paper, the fractional differintegration definition problem is studied from a systems point of view. Both local (Grunwald-Letnikov) and global (convolutional) definitions are considered. It is shown that the Cauchy formulation should be adopted since it is coherent with usual practice in signal processing and control applications.  相似文献   
34.
Wireless Networks - D2D (device-to-device) communication is one of the developments of 5G networks (5th generation mobile networks) that reduce mobile traffic load, reduce energy consumption and...  相似文献   
35.
Summary When immersed in milk, breakfast cereal easily take up moisture, lose their brittle texture and become soggy. Earlier comparative analysis of the moisture sorption by breakfast cereal immersed in water and milk indicated that milk solids might play an important role on the sorption kinetics. In this work, the moisture uptake by ready-to-eat corn breakfast cereal immersed in milk solutions, reconstituted from whole and skimmed milk powder, was measured under isothermal conditions at 5, 30 and 55 °C. Dilutions between 0.25 and 1.5 were tested, with the factor of dilution 1 corresponding to the standard recommended by the milk powder manufacturer. The Weibull probabilistic model adequately fitted the experimental data by appropriate choice of its variable parameters. The dependence of the model parameters on temperature and total solids concentration was assessed for both skimmed and whole milk. Fat was found to play a major role on the process mechanism, which was attributed to the deposition of a fat layer at the solid matrix surface, hindering water and solids uptake. Yet, for short times, moisture uptake proceeded at a similar rate both in skimmed and whole milk.  相似文献   
36.
This paper presents an image-based dynamic visual servoing to make a mobile robot able to track a moving object on the workspace by using a calibrated on board vision system. The stability of the proposed system is proved based on its passivity properties. A robustness analysis and an L2-gain performance analysis are also presented. Experimental results are shown to illustrate the system performance.  相似文献   
37.
Received video quality is dependent on the available link rate and the packet loss ratio, which are correlated in a busy network link. Even low packet loss ratios (PLRs) can significantly reduce the video quality. In this paper, a packet level parity Forward Error Correction (FEC) is applied to the video stream in order to reduce the video PLR. A constant gross data rate is assumed, such that adding a FEC leads to a decrease in effective video data rate. The FEC block is truncated at the end of each video VOP, such that there are no inter-VOP dependencies for FEC correction. An algorithm is proposed to optimize the FEC length, based on the Quality of Experience as modelled by the ITU-T R G.1070 standard. It is shown that the optimization algorithm can significantly increase the video quality, without increasing the gross data rate. The algorithm has been evaluated both analytically and through simulations, which confirm the very significant increases in subjective video quality.  相似文献   
38.
A two-step transistor sizing optimization method based on geometric programming for delay/area minimization is presented. In the first step, Elmore delay is minimized using only minimum and maximum transistor size constraints. In the second step, the minimized delay found in the previous step is used as a constraint for area minimization. In this way, our method can target simultaneously both delay and area reduction. Moreover, by relaxing the minimized delay, one may further reduce area with small delay penalty. Gate sizing may be accomplished through transistor sizing tying each transistor inside a cell to a same scale factor. This reduces the solution space, but also improves runtime as less variables are necessary. To analyze this tradeoff between execution time and solution quality a comparison between gate sizing and transistor sizing is presented. In order to qualify our approach, the ISCAS??85 benchmark circuits are mapped to a 45?nm technology using a typical standard cell library. Gate sizing and transistor sizing are performed considering delay minimization. Gate sizing is able to reduce delay in 21?%, on average, for the same area and power values of the sizing provided by standard-cells library. Then, the transistor sizing is executed and delay can be reduced in 40.4?% and power consumption in 2.9?%, on average, compared to gate sizing. However, the transistor sizing takes about 23 times longer to be computed, on average, using a number of variables twice higher than gate sizing. Gate sizing optimizing area is executed considering a delay constraint. Three delay constraints are considered, the minimum delay given by delay optimization and delay 1 and 5?% higher than minimum delay. An energy/delay gain (EDG) metric is used to quantify the most efficient tradeoff. Considering the minimum delay, area (power) is reduced in 28.2?%, on average. Relaxing delay by just 1?%, area (power) is reduced in 41.7?% and the EDG metric is 41.7. Area can be reduced in 51?%, on average, relaxing delay by 5?% and EDG metric is 10.2.  相似文献   
39.
The Web of Data is an emerging research field that contributes to make better decisions because it gathers, combines and analyses different data sources available worldwide. Educational data is an interesting domain because it deals with the quality of the education itself and educational institutions which are common goals for every country. This paper is devoted to present how this idea has been used to improve a learning analytics tool. By means of this tool, teachers can perform teamwork competence assessment of a group of students taking into account how the individuals acquire the essential components of such competence. In this sense, authors use the Comprehensive Training Model of the Teamwork Competence in Engineering Domain (CTMTC) method to gather competence evidences and improve the system with a learning analytics tool to support the process. This tool is able to transform competence evidences and stores them in a competence ontology built upon ISO 10018 concepts. The final result is the production of educational results for the web of data.  相似文献   
40.
This paper addresses the problem of direction-of-arrival (DOA) parameter estimation in array processing when the signals are inherently discrete, which is the case mainly in the digital communication context. Based on the particular structure of the signal space in the data model, a maximum likelihood-based approach is introduced. The strategy consists in transforming the parameter estimation problem into a decision task. It is shown through numerical simulations that the proposed solution closely follows the performance limit given by the Cramér–Rao bound. Some important features of the technique are as follows: (i) it is capable of handling any number of sources, provided that the number of sensors is greater than or equal to two and the number of snapshots is sufficiently greater than the cardinality of the signal space; (ii) the estimation quality is not affected by the angle and phase separation; and (iii) it offers the possibility to deal with uncalibrated arrays.  相似文献   
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