Reducing transmit power is the most straightforward way towards more energy-efficient communications, but it results in lower SNRs at the receiver which can add a performance and/or complexity cost. At low SNRs, synchronization and channel estimation errors erode much of the gains achieved through powerful turbo and LDPC codes. Further expanding the turbo concept through an iterative receiver—which brings synchronization and equalization modules inside the loop—can help, but this solution is prohibitively complex and it is not clear what can and what cannot be a part of the iterative structure. This paper fills two important gaps in this field: (1) as compared to previous research which either focuses on a subset of the problem assuming perfect remaining parameters or is computationally too complex, we propose a proper partitioning of algorithm blocks in the iterative receiver for manageable delay and complexity, and (2) to the best of our knowledge, this is the first physical demonstration of an iterative receiver based on experimental radio hardware. We have found that for such a receiver to work, (1) iterative timing synchronization is impractical, iterative carrier synchronization can be avoided by using our proposed approach, while iterative channel estimation is essential, and (2) the SNR gains claimed in previous publications are validated in indoor channels. Finally, we propose a heuristic algorithm for simplifying the carrier phase synchronization in an iterative receiver such that computations of the log likelihood ratios of the parity bits can be avoided to strike a tradeoff between complexity and performance. 相似文献
Long fast Fourier transforms (FFTs) are required in applications such as orthogonal frequency division multiplexing, radars and sonars. It is highly desirable to reduce the size and power requirements of the FFT so as to realise single chip long FFT-based systems targeting portable applications. Presented here is a novel technique to reduce the coefficient memory almost by a factor of four by exploiting the relationships among the coefficient values thereby significantly reducing the area and power requirements of the hardware 相似文献
LTE networks’ main challenge is to efficiently use the available spectrum, and to provide satisfying quality of service for mobile users. However, using the same bandwidth among adjacent cells leads to occurrence of Inter-cell Interference especially at the cell-edge. Basic interference mitigation approaches consider bandwidth partitioning techniques between adjacent cells, such as frequency reuse of factor m schemes, to minimize cell-edge interference. Although SINR values are improved, such techniques lead to significant reduction in the maximum achievable data rate. Several improvements have been proposed to enhance the performance of frequency reuse schemes, where restrictions are made on resource blocks usage, power allocation, or both. Nevertheless, bandwidth partitioning methods still affect the maximum achievable throughput. In this proposal, we intend to perform a comprehensive survey on Inter-Cell Interference Coordination (ICIC) techniques, and we study their performance while putting into consideration various design parameters. This study is implemented throughout intensive system level simulations under several parameters such as different network loads, radio conditions, and user distributions. Simulation results show the advantages and the limitations of each technique compared to frequency reuse-1 model. Thus, we are able to identify the most suitable ICIC technique for each network scenario. 相似文献
Cognitive Radio Networks (CRNs) have been receiving significant research attention recently due to their ability to solve issues associated with spectrum congestion and underutilization. In a CRN, unlicensed users (or Secondary Users, SUs) are able to exploit and use underutilized licensed channels, but they must evacuate the channels if any interference is caused to the licensed users (or Primary Users, PUs) who own the channels. Due to the dynamicity of spectrum availability in CRNs, design of protocols and schemes at different layers of the SU’s network stack has been challenging. In this article, we focus on routing and discuss the challenges and characteristics associated with it. Subsequently, we provide an extensive survey on existing routing schemes in CRNs. Generally speaking, there are three categories of challenges, namely channel-based, host-based, and network-based. The channel-based challenges are associated with the operating environment, the host-based with the SUs, and the network-based with the network-wide SUs. Furthermore, the existing routing schemes in the literature are segregated into three broad categories based on the relationship between PUs and SUs in their investigation, namely intra-system, inter-system, and hybrid-system; and within each category, they are further categorized based on their types, namely Proactive, Reactive, Hybrid, and Adaptive Per-hop. Additionally, we present performance enhancements achieved by the existing routing schemes in CRNs. Finally, we discuss various open issues related to routing in CRNs in order to establish a foundation and to spark new interests in this research area. 相似文献
In communication industry one of the most rapidly growing area is wireless technology and its applications. The efficient access to radio spectrum is a requirement to make this communication feasible for the users that are running multimedia applications and establishing real-time connections on an already overcrowded spectrum. In recent times cognitive radios (CR) are becoming the prime candidates for improved utilization of available spectrum. The unlicensed secondary users share the spectrum with primary licensed user in such manners that the interference at the primary user does not increase from a predefined threshold. In this paper, we propose an algorithm to address the power control problem for CR networks. The proposed solution models the wireless system with a non-cooperative game, in which each player maximize its utility in a competitive environment. The simulation results shows that the proposed algorithm improves the performance of the network in terms of high SINR and low power consumption.
Fabrication cost of application-specific integrated circuits (ASICs) is exponentially rising in deep submicron region due to rapidly rising non-recurring engineering cost. Field programmable gate arrays (FPGAs) provide an attractive alternative to ASICs but consume an order of magnitude higher power. There is a need to explore ways of reducing FPGA power consumption so that they can also be employed in ultra low power (ULP) applications instead of ASICs. Subthreshold region of operation is an ideal choice for ULP low-throughput FPGAs. The routing of an FPGA consumes most of the chip area and primarily determines the circuit delay and power consumption. There is a need to design moderate-speed ULP routing switches for subthreshold FPGA. This article proposes a novel subthreshold FPGA routing switch box (SB) that utilises the leakage voltage through transistor as biasing voltage which shows 69%, 61.2% and 30% improvement in delay, power delay product and delay variation, respectively, over conventional routing SB. 相似文献
Orthogonal frequency division multiplexing (OFDM) has a very high peak-to-average power ratio (PAPR) that causes a severe nonlinear distortion in practical hardware implementation of high power amplifiers (HPA). In this article, a new PAPR reduction method is proposed based on autoregressive (AR) error filtering. This method proposes the use of signal whitening property of error filtering as a preprocessing step to remove the predictable content of stationary stochastic processes which can reduce the autocorrelation of input data sequences and is shown to be a very effective solution for the PAPR problem in OFDM systems. It is shown that the proposed method can achieve a significant reduction in PAPR without degrading the error performance or power spectral levels. It is also shown that the proposed method is applicable to any modulation scheme and can work for any number of subcarriers under both additive white Gaussian noise and wireless Rayleigh fading channel. 相似文献
The strategy and status of a process simulator for the flexible manufacture of HgCdTe infrared focal plane arrays is described.
It has capabilities to simulate Hg vacancy and interstitial effects and cation impurity diffusion, for various boundary conditions
in one dimension. Numerical complexity of these problems stems from the necessity of solving diffusion equations for each
defect that are coupled to each other via nonlinear interaction terms. The simulator has already led to the prediction of
heretofore unexplained experimental data. Current extensions of the one-dimensional simulator planned over the next few years
include the addition of Te antisites, antisite-Hg vacancy pairs, and In-Hg vacancy pairs, ion implantation, and various energetic
processes (such as ion milling). The sequential effect of various processes will be possible with the input to the simulator
looking much like a process run sheet. 相似文献
A test sequence generation method is proposed for testing the conformance of a protocol implementation to its specification in a remote testing system where both external synchronization and input/output operation costs are taken into consideration. The method consists of a set of transformation rules that constructs a duplexU digraph from a given finite state machine (FSM) representation of a protocol specification; and an algorithm that finds a rural postman tour in the duplexU digraph to generate a synchronizable test sequence utilizing multiple UIO sequences. If the protocol satisfies a specific property, namely, the transitions to be tested and the UIO sequences to be employed form a weakly-connected subgraph of the duplexU digraph, the proposed algorithm yields a minimum-cost test sequence. X.25 DTE and ISO Class 0 transport protocols are shown to possess this property. Otherwise, the algorithm yields a test sequence whose cost is within a bound from the cost of the minimum-cost test sequence. The bound for the test sequence generated from the Q.931 network-side protocol is shown to be the cost sum of an input/output operation pair and an external synchronization operation 相似文献