Numerical Analysis of the Boundary Scattering Effect on Transport Properties in Bi-Sb Nanowires

In this study, we have numerically analyzed the transport properties of Bi-Sb nanowires, taking into account wire boundary scattering. Wire boundary scattering slightly decreased the Seebeck coefficient of Bi-Sb nanowires. This effect is due to the observation that boundary scattering and the mobility ratio of L-point electrons to T-point holes in the nanowires are smaller than those in bulk Bi-Sb because the wire boundary scattering suppresses the mobilities of L-point electrons and heavy holes. The largest Seebeck coefficient for all wire diameters was obtained when the Sb concentration was 5 at.%. The effective mass approached zero near 5 at.% Sb, and the small effective mass led to a large subband shift in each band. Thus, a small effective mass enhances the quantum effect at a fixed wire diameter, even if wire boundary scattering is taken into account.     

25 Gbit/s selector module using 0.2 mu m GaAs MESFET technology

A high-speed selector module has been developed. It is constructed from a selector IC mounted in a ceramic package, a power supply unit, phase shifters, and coaxial cables. The IC was designed using LSCFL and fabricated with 0.2 mu m gate length GaAs MESFETs. The selector module operated above 25 Gbit/s. It is expected to be applied to high-speed IC measurements.<>     

Aging time dependence of catastrophic optical damage (COD) failureof a 0.98-μm GaInAs-GaInP strained quantum-well laser

In this paper, we studied the aging time dependence of the catastrophic optical damage (COD) failure of an Al-free uncoated 0.98-μm GaInAs-GaInP strained quantum-well laser with an injection current as a parameter. Based on the stress-strength model, we first investigated experimentally the dependence of the critical power level (CPL) at which COD would take place upon the aging time. Then applying a statistical treatment to this result, we found for the first time that CPL data at each aging time could be considered to distribute according to the Weibull statistics, and the decrease rate of the CPL with the aging time depended very strongly on the injection current. Finally, using the relationship between the decrease rate of the CPL with the aging time and the current, we predicted roughly the time of a COD failure occurrence for both large and small current cases. As a result, we clarified that for our Al-free uncoated 0.98-μm laser, a COD failure became a fatal problem in the case of a large-current (high-power) operation     

A super-dynamic flip-flop circuit for broad-band applications up to24 Gb/s utilizing production-level 0.2-μm GaAs MESFETs

This paper describes a novel dynamic flip-flop (FF) circuit that can operate 30% faster than conventional clocked inverter-type FFs. A new wideband clock buffer is introduced to cover the FF operation range. An 8- to 24-Gb/s decision circuit and a 9- to 26-GHz 1/2 frequency divider were developed utilizing production-level 0.2-μm GaAs MESFET technology     

Adaptive Playout Buffer Algorithm for Enhancing Perceived Quality of Streaming Applications

An end-to-end packet delay in the Internet is an important performance parameter, because it heavily affects the quality of real-time applications. In the current Internet, however, because the packet transmission qualities (e.g., transmission delays, jitters, packet losses) may vary dynamically, it is not easy to handle a real-time traffic. In UDP-based real-time applications, a smoothing buffer (playout buffer) is typically used at a client host to compensate for variable delays. The issue of playout control has been studied by some previous works, and several algorithms controlling the playout buffer have been proposed. These studies have controlled the network parameters (e.g., packet loss ratio and playout delay), not considered the quality perceived by users. In this paper, we first clarify the relationship between Mean Opinion Score (MOS) of played audio and network parameters (e.g., packet loss, packet transmission delay, transmission rate). Next, utilizing the MOS function, we propose a new playout buffer algorithm considering user's perceived quality of real-time applications. Our simulation and implementation tests show that it can enhance the perceived quality, compared with existing algorithms.     

An 80-Gb/s optoelectronic delayed flip-flop IC using resonanttunneling diodes and uni-traveling-carrier photodiode

This paper describes an 80-Gb/s optoelectronic delayed flip-flop (D-FF) IC that uses resonant tunneling diodes (RTDs) and a uni-traveling-carrier photodiode (UTC-PD). A circuit design that considers the AC currents passing through RTDs and UTC-PD is key to boosting circuit operation speed. A monolithically fabricated IC operated at 80 Gb/s with a low power dissipation of 7.68 mW. The operation speed of 80 Gb/s is the highest among all reported flip-flops. To clarify the maximum operation speed, we analyze the factors limiting circuit speed. Although the bandwidth of UTC-PD limits the maximum speed of operation to 80 Gb/s at present, the circuit has the potential to offer 100-Gb/s-class operation     

Surge analysis of induction heating power supply with PLL

Surges are undesirable with respect to both the reliability and the efficiency of power devices. In this paper, the surge mechanism of an induction heating power supply is studied. First, a modified phase locked loop (PLL) controller is proposed such that the changing resonant frequency of the heated load can be tracked correctly and the zero voltage switching (ZVS) can be reliably maintained simultaneously. Then, a very simple and practical surge model is proposed. Surge analyses for both ZVS and non-ZVS modes are made in sequence. It is found that the extra energy built up in the line inductance during the reverse recovery process of the diodes plays a very important role in generating huge voltages. Finally, some simulation and measured results are provided to verify the validity of the proposed surge model     

Survey of switching techniques in high-speed networks and their performance

One of the most promising approaches for high speed networks for integrated service applications is fast packet switching, or ATM (asynchronous transfer mode). ATM can be characterized by very high speed transmission links and simple, hard-wired protocols within a network. To match the transmission speed of the network links, and to minimize the overhead due to the processing of network protocols, the switching of cells is done in hardware switching fabrics in ATM networks. A number of designs have been proposed for implementing ATM switches. Although many differences exist among the proposals, the vast majority of them are based on self-routeing multistage interconnection networks. This is because of the desirable features of multi-stage interconnection networks such as self-routeing capability and suitability for VLSI implementation. Existing ATM switch architectures can be classified into two major classes: blocking switches, where blockings of cells may occur within a switch when more than one cell contends for the same internal link, and non-blocking switches, where no internal blocking occurs. A large number of techniques have also been proposed to improve the performance of blocking and non-blocking switches. In this paper, we present an extensive survey of the existing proposals for ATM switch architectures, focusing on their performance issues.     

Cytochemistry of gastric parietal cells with high-pressure freezing followed by freeze-substitution

Gastric parietal cells were examined for changes in their ultrastructure and distribution of the proton pump during feeding and fasting states in rats. The fundic glands from rats fed ad libitum or fasted with free access to water were cryofixed using high-pressure freezing followed by freeze-substitution in acetone containing osmium or acrolein and then embedded in Epon 812 or Lowicryl K4M resin, respectively. Excellent ultrastructural preservation was achieved. During the feeding state, intracellular canaliculi and numerous microvilli were well developed, while tubulovesicles were poorly developed. In contrast, during the fasting state, the microvilli in the narrowed space of the intracellular canaliculi were tightly packed and the tubulovesicles were enlarged. Ultrathin sections were immunostained with antibodies against the alpha- and beta-subunits of the proton pump, H+ x K(+)-ATPase, using the immunogold method. The labelling was strong and clearly localized in comparison with that obtained using the conventional chemical-fixation method. Each subunit was localized on the membrane of the microvilli, intracellular canaliculi and tubulovesicles. The distribution of subunit proteins varied between the two states. During ad libitum feeding, the immunolabelling was localized strongly on the membranes of the microvilli and intracellular canaliculi. In contrast, the labelling was strong on the tubulovesicle membrane in the fasting state. The results obtained with each anti-subunit antibody by H+ x K(+)-ATPase immunostaining revealed differences in distribution and labelling density between the feeding and fasting states.     

Electron-microscopic imaging of single-walled carbon nanotubes grown on silicon and silicon oxide substrates

Direct imaging of single-walled carbon nanotubes (SWNTs) suspended on pillar-patterned Si or SiO2 substrates is investigated using transmission electron microscopy (TEM) and scanning electron microscopy (SEM). The suspended nanotubes are successfully observed by direct TEM imaging and it is seen that they have either individual or bundles of SWNTs. Low energy (< or =2 keV) SEM produces high contrast images of suspended SWNTs. On the contrary, when SWNTs contact a SiO2 substrate, they are imaged using electron-beam induced current. The image brightness depends on the length of SWNTs.