Analysis of ATPMOS configurations-based 4 × 1 multiplexer with estimation of power and delay

In this article, two consecutive augmenting transistor P-channel metal oxide semiconductor (ATPMOS) configurations are proposed. These two ATPMOS configurations (ST ATPMOS and DT ATPMOS) are implemented on a 4 × 1 (multiplexer) mux circuit. Leakage power dissipation, dynamic power dissipation and delay performance parameters are calculated for both (ST ATPMOS and DT ATPMOS) ATPMOS configurations-based 4 × 1 mux circuits at different values of transistor’s width. Due to simulation, it is realised that the leakage power dissipation and dynamic power dissipation are reduced and delay is improved (delay is reduced) in the DT ATPMOS configuration-based mux circuit compared to the ST ATPMOS configuration-based mux circuit. The whole simulation process was carried out in 45-nm technology. The circuits were operated at 1-V power supply.     

DDFSGEN

This paper presents a functional compiler for the automatic design of Direct Digital Frequency Synthesizer (DDFS) integrated circuits (ICs) using a ROM based table look-up architecture. The compiler allows the user to specify high-level specifications such as the acceptable spurious response and it generates the IC architecture, floorplan, and layout. To construct the layout for different specifications, a library of parameterized macrocells has been developed in 1.2 m CMOS technology.A test chip with a quadrature DDFS module has been generated, using the compiler, and fabricated. The chip has two input signals: one is for frequency control while the other is for phase initialization. Input and output word lengths are 16 bits and 6 bits respectively. The chip complexity is approximately 12,000 transistors (DDFS core) and the die size is 4.8×2.9mm ². A maximum sample rate of 80 MHz has been attained implying a maximum sine (cosine) output frequency of 40 MHz and a frequency resolution of 1.22 kHz. The maximum spurious level measured is –46 dB.     

A radix-8 wafer scale FFT processor

Wafer Scale Integration promises radical improvements in the performance of digital signal processing systems. This paper describes the design of a radix-8 systolic (pipeline) fast Fourier transform processor for implementation with wafer scale integration. By the use of the radix-8 FFT butterfly wafer that is currently under development, continuous data rates of 160 MSPS are anticipated for FFTs of up to 4096 points with 16-bit fixed point data.     

Estimating architectural resources and performance for high-levelsynthesis applications

The authors present a solution to the following problems related to architectural synthesis. (1) Given an input specification and a performance constraint, determine a lower bound number of resources (active and interconnect) required to execute the data flow graph while satisfying the performance constraint. (2) Determine a lower bound performance for executing an input specification for a given number of resources (active and interconnect). These bounds are close to the actual designs synthesized by several existing systems     

Resonant tunneling transistor lasers: A new approach to obtain multi-state switching and bistable operation

Bipolar resonant tunneling heterotransistor structures, which can be configured to operate as multi-state or as bistable lasers, are described. Both edge and surface-emitting structures are presented. Computations of various optoelectronics parameters including confinement factor, threshold current density, and cavity modes for a stripe-geometry structure are presented. In addition, simulations of base and collector currents are given for a resonant tunneling transistor to demonstrate the feasibility of lasing in the base region.     

Experimental investigations on solar chimney for room ventilation

Experimental investigations on a small size solar chimney show that the rate of ventilation increases with increase of the ratio between height of absorber and gap between glass and absorber. This finding is in agreement with results of the steady-state mathematical model developed for analysis of such systems. Nine different combination of absorber height and air gap have been investigated on the experimental set-up. Highest rate of ventilation induced with the help of solar energy was found to be 5.6 air change per hour in a room of 27 m³, at solar radiation 700 W/m² on vertical surface with the stack height-air gap ratio of 2.83 for a 1 m high chimney.     

Variation of minority carrier lifetime with level of injection in p-n-junction devices

Minority-carrier lifetime as a function of level of injection has been measured for a number of Si and Ge p-n-junction diodes using reverse recovery and forward current-induced voltage decay methods. It is found that the lifetime always increases with injection level if the effect of the finite thickness of the base of the diode is taken into account while interpreting the experimental results. The decrease in the life-time values reported in the literature appears to be due to erroneous interpretation of the experimental data.     

Minimal pathset and minimal cutsets using search technique

Application of graph theory to reliability analysis was first made in 1970 ^[1]. Over the years, a large number of computer programmes have been developed to determine the spanning trees, the minimal paths and cutsets, which are essential for determining the reliability of the network. In recent years, there has been an interest 2., 4. in developing small desk top calculators for specific purposes, which could be used by the designers of transportation systems, communication systems, etc. In this article the authors present an approach to design a microprocessor based equipment to determine minimal pathset and minimal cutset from the incidence matrix of the graph. The authors have presented a new design approach, based on search technique. The salient feature of the new approach is a novel tracing process in which the desired graph is traced by operating a set of constraints. The new design approach has already been used by the authors to develop a microprocessor based spanning tree generator 2., 3..     

Monolithic semiconductor antennas for millimeter wave Si and GaAs integrated circuit technologies

It has been reported that the radiation characteristics of semiconductor antennas can be controlled by modulating their conductivity during fabrication and/or operation. This paper describes novel physical layouts integrating these versatile antennas with other components used in the realization of millimeter wave systems. The monolithic integration is discussed for GaAs as well as Si IC technologies.     

Stabilisation of external optical feedback phase in a semiconductor laser

The linewidth of a semiconductor laser was reduced and held to much less than 1 MHz using a simple DC scheme for the stabilisation of the phase of external optical feedback. This scheme was based on the antisymmetric response to feedback phase at the two laser facets.