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11.
We have developed a mutant strain derived from Agrobacterium sp. ATCC 31750, which produces a water-soluble polysaccharide having potential utility to the food, feed, pharmaceutical and cosmetic industries. A high concentration of product (15 g/L) is obtained by 48 h cultivation of the mutant strain under optimized fermentation conditions. The water-soluble polysaccharide obtained from cultures of the mutant strain beta82 has Glc:Man:Gal in approximate molar ratios of 5.8:6.7:1.0. The molecular weight of the polysaccharide was determined to be approximately 1000 kDa by HPSEC analysis. Linkage analysis contained 3-Glcp, 3-Manp, terminal Glcp and terminal Manp, as well as a small proportion of 3- and 3,4-Galp, and 4,6-Manp residues. Based on analyses using FT-IR and 13C NMR spectrometers, most glycosidic bonds joining these sugar residues are of the α-type, and acetyl groups are apparently attached to the polymer chain at random.  相似文献   
12.
On the SEP of Cooperative Diversity with Opportunistic Relaying   总被引:1,自引:0,他引:1  
We analyze the exact symbol error probability (SEP) of cooperative diversity with opportunistic amplify-and-forward (AF) relaying. The benefit of this opportunism to the SEP is assessed by comparing with maximal ratio combining of orthogonal multiple AF relay transmissions.  相似文献   
13.
A tri-gate bulk MOSFET design utilizing a low-aspect-ratio channel is proposed to provide an evolutionary pathway for CMOS scaling to the end of the roadmap. 3-D device simulations indicate that this design offers the advantages of a multi-gate FET (reduced variability in performance and improved scalability) together with the advantages of a conventional planar MOSFET (low substrate cost and capability for dynamic threshold-voltage control).  相似文献   
14.
We propose architectural mechanisms for structuring host communication software to provide QoS guarantees. We present and evaluate a QoS sensitive communication subsystem architecture for end hosts that provides real time communication support for generic network hardware. This architecture provides services for managing communication resources for guaranteed QoS (real time) connections, such as admission control, traffic enforcement, buffer management, and CPU and link scheduling. The architecture design is based on three key goals: maintenance of QoS guarantees on a per connection basis, overload protection between established connections, and fairness in delivered performance to best effort traffic. Using this architecture we implement real time channels, a paradigm for real time communication services in packet switched networks. The proposed architecture features a process per channel model that associates a channel handler with each established channel. The model employed for handler execution is one of “cooperative” preemption, where an executing handler yields the CPU to a waiting higher priority handler at well defined preemption points. The architecture provides several configurable policies for protocol processing and overload protection. We present extensions to the admission control procedure for real time channels to account for cooperative preemption and overlap between protocol processing and link transmission at a sending host. We evaluate the implementation to demonstrate the efficacy with which the architecture maintains QoS guarantees on outgoing traffic while adhering to the stated design goals  相似文献   
15.
In a high-resolution flat panel system, a conventional interface that directly connects a liquid crystal display (LCD) controller to a flat panel cannot overcome the problems of excess EMI (electromagnetic interference) and power caused by full-swing transmission signals in parallel lines. This paper presents a high-speed digital video interface system implemented with a low-cost standard CMOS (complimentary metal-oxide-semiconductor) technology that can mitigate EMI and power problems in high-resolution flat panel display systems. The combined architecture of the high-speed, small number of parallel lines and low-voltage swing serial interface can support resolutions from VGA (640×480 pixels) up to XGA (1024×768 pixels) with significant power improvement and drastic EMI reduction. To support high-speed, low-voltage swing signaling and overcome channel-to-channel skew problems, a robust data recovery system is required. The proposed digital phase-locked loop enables robust skew-insensitive data recovery of up to 1.04 GBd  相似文献   
16.
Fatigue crack propagation properties from small sized rod specimens   总被引:1,自引:0,他引:1  
Mechanical properties characterization is needed in many industrial applications yet sufficient amount of material for fabricating standard-sized testing specimens is often not available. Techniques for testing miniaturized specimen must be adopted. Much effort has been made to develop techniques for impact, fracture toughness and tensile properties of sub-sized specimens. Work on the testing of fatigue properties is more limited. In this study, fatigue crack propagation behavior is evaluated from the growth of surface crack in a cylindrical rod under tension. Rods of various lengths and diameters were tested. As the size of the rod specimen is reduced, the fatigue crack growth rate tends to increase when correlated using the stress intensity factor range. This increase is explained largely by the decrease in the degree of premature crack closure in the small specimens. Valid fatigue crack growth data can be obtained among the specimens examined except on the crack growth on the surface of the smallest specimen, which has a length of 26 mm and diameter of 8 mm. Even so, valid data can still be elucidated on the latter specimen if the interior growth is considered. The dimensions of the latter specimen allow fatigue properties to be evaluated using broken remnants from impact or other test specimens.  相似文献   
17.
A second-order cross-coupled combline filter which has three finite transmission zeros is presented. The problem of the frequency-invariant coupling in a real circuit is introduced. To make extra transmission zeros, a top metalized dielectric block is used.  相似文献   
18.
The stress-whitened damage zone that formed ahead of a semicircular notch during slow tensile loading has been measured from optical micrographs of translucent blends of poly(vinyl chloride) (PVC) with experimental chlorinated polyethylene (CPE) resins. When the zone was small, the plane strain condition applied and from the elastic stress distribution a constant mean stress condition was found at the boundary of the crescent-shaped zone. The critical mean stress did not depend on the chlorine content or the chlorine distribution of the experimental CPE resin used in the blend. While the critical mean stress decreased as the amount of CPE in the blend was increased, the critical volume strain, calculated from the bulk modulus, was independent of composition and was thought to be the controlling parameter for stress-whitening. When the zone was larger, the shape was qualitatively described by concepts of stress redistribution in the presence of a plastic zone ahead of the notch. Macroscopic flow and necking were only detected near the maximum in the stress-displacement curve.  相似文献   
19.
A MOSFET structure with a nonoverlapped source/drain (S/D) to gate region was proposed to overcome the challenges in sub-50-nm CMOS devices. Key device characteristics were investigated by extensive simulation study. Fringing gate electric field through the spacer induces an inversion layer in the nonoverlap region to act as an extended S/D region. An oxide spacer is used to reduce parasitic gate overlap capacitance. A reasonable amount of inversion electrons were induced under the spacers. Internal physics, speed characteristics, short channel effects, and RF characteristics were studied with the nonoverlap distance at a fixed metallurgical channel length of 40 nm. The proposed structure had good drain-induced barrier lowering and V/sub T/ rolloff characteristics and showed reasonable intrinsic gate delay and cutoff frequency compared to those of an overlapped structure.  相似文献   
20.
A logic language is suitable for specification if it is equipped with features for data abstraction and modularization. In this paper, an effective mechanism to incorporate function and type into logic programming is presented as the means to embed data abstraction mechanism into logic programming. This incorporation is essentially based on Horn clause logic with equality and a polymorphic type system that is an extension of Mycroft and O’Keefe’s system. This paper also presents an implementation based on Warren Abstract Machine (WAM) and shows the performance, along with a comparison with WAM.  相似文献   
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